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P5CD021X0 Datasheet(PDF) 4 Page - NXP Semiconductors |
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P5CD021X0 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 20 page P5CD016_021_041_51_Cx081_FAM_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product short data sheet PUBLIC Rev. 3.2 — 14 March 2011 150332 4 of 20 NXP Semiconductors P5CD016/021/041/051 and P5Cx081 Secure dual interface and contact PKI smart card controller Operated both in Contact mode (ISO/IEC 7816) and in S2C mode, the user defines the final function of the controller chip with its operating system. This allows the same level of security, functionality and flexibility for the contact interface and the S2C interface. The S2C interface is connected to the internal ISO/IEC 14443 CIU. The CIU handles the demodulation and the modulation of the S2C signals which enables a full contactless communication via this interface, and the NFC front-end can be enabled. As the S2C interface is connected to the CIU, the power to the P5CN081 must be supplied via the VDD and VSS pads in order to use the S2C interface. The S2C interface does not need any software adaptation compared to normal contactless operation. When connected to the S2C interface of a NFC front-end, the device is compatible with existing MIFARE reader infrastructure, and the optional emulation modes of MIFARE 1 K or MIFARE 4 K enable fast system integration and backward compatibility to MIFARE based cards. The communication on the S2C interface supports both the ISO/IEC 14443 A part 3 and the ISO/IEC 14443 part 4. 1.6 Security features SmartMX incorporates a wide range of both inherent and OS-controlled security features as a countermeasure against all types of attack. NXP Semiconductors apply their extensive knowledge of chip security, combined with handshaking circuit technology, very dense 5-metal layer 0.14 μm technology, glue logic and active shielding methodology for optimum results in CC EAL5+, EMVCo and other third-party certifications and approvals. SmartMX Memory Management Unit (MMU), designed to define various memory segments and assign security attributes accordingly, supports a strong firewall concept that keeps different applications separate from each other. Only the System mode has full access privileges to all memory space and on-chip peripherals, while the User mode only has privileges defined upon card personalization and executed under the control of the System mode. Secure Fetch technology significantly enhances the chip hardware security against certain classes of light attack using light directed at chip hardware. More specifically, Secure Fetch offers increased protection against attacks using higher spatial resolution and those using shorter and longer light pulses with both single and multiple pulses. It protects both the device memory and ROM, RAM and EEPROM code fetching operations, greatly increasing the probability of detecting fault injection attacks. This unique security technology offers increased protection against future attack scenarios that use light and laser sources, facilitating the development of highly secure software applications for customers. The SmartMX security features are acknowledged as having outstanding properties by most NXP Semiconductors’ customers. The countermeasures against light attacks are regarded as “best-in-class”. |
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