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R5F36CAMDFB Datasheet(PDF) 11 Page - Renesas Technology Corp |
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R5F36CAMDFB Datasheet(HTML) 11 Page - Renesas Technology Corp |
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11 / 99 page  R01DS0034EJ0200 Rev.2.00 Page 11 of 95 Feb 07, 2011 M16C/6C Group 1. Overview 1.6 Pin Functions Power supply: VCC2 is used to supply power to the external bus associated pins. The dual power supply configuration allows VCC2 to interface at a different voltage than VCC1. Note: 1. VCC means VCC1 unless otherwise noted. Table 1.6 Pin Functions (1/3) Signal Name Pin Name I/O Power Supply Description Power supply input VCC1, VCC2, VSS I- Apply 2.7 to 5.5 V to pins VCC1 and VCC2 (VCC1 ≥ VCC2). Input 0 V to VSS.(1) Analog power supply input AVCC, AVSS I VCC1 This is the power supply for the A/D converter. Connect the AVCC pin to VCC1, and connect the AVSS pin to VSS. Reset input RESET I VCC1 Driving this pin low resets the MCU. CNVSS CNVSS I VCC1 Input pin to switch processor modes. Connect the CNVSS pin to VSS via a resistor. Bus control pins D0 to D7 I/O VCC2 Inputs or outputs data (D0 to D7) while accessing an external area with a separate bus. A0 to A19 O VCC2 Outputs address bits A0 to A19. A0/D0 to A7/D7 I/O VCC2 Inputs or outputs data (D0 to D7) and outputs address bits (A0 to A7) by timesharing, while accessing an external area with an 8-bit multiplexed bus. CS0 to CS3 O VCC2 Outputs chip-select signals CS0 to CS3 to specify an external area. WR BHE RD O VCC2 Outputs WR, BHE, and RD signals. • Data is written to an external area when WR is driven low. Data in an external area is read when RD is driven low. An odd address is accessed when BHE is driven low. ALE O VCC2 Outputs an ALE signal to latch the address. HOLD I VCC2 HOLD input is unavailable. Connect the HOLD pin to VCC2 via a resistor (pull-up). HLDA O VCC2 In a hold state, HLDA outputs a low-level signal. RDY I VCC2 The MCU bus is placed in a wait state while the RDY pin is driven low. |
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