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DS1842 Datasheet(PDF) 5 Page - Maxim Integrated Products |
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DS1842 Datasheet(HTML) 5 Page - Maxim Integrated Products |
5 / 6 page 76V, APD, Bias Output Stage with Current Monitoring _______________________________________________________________________________________ 5 Detailed Description The DS1842 contains discrete high-voltage compo- nents required to create an APD bias voltage and to monitor the APD bias current. The device’s mirror out- puts are a current that is a precise ratio of the output current across a large dynamic range. The mirror response time is fast enough to comply with GPON Rx burst-mode monitoring requirements. The device has a built-in current-limiting feature to protect APDs. The APD current can also be shut down by CLAMP or ther- mal shutdown. The internal FET is used in conjunction with a DC-DC boost controller to precisely create the APD bias voltage. Current Mirror The DS1842 has two current mirror outputs. One is a 10:1 mirror connected at MIR1, and the other is a 5:1 mirror connected to MIR2. The mirror output is typically connected to an ADC using a resistor to convert the mirrored current into a voltage. The resistor to ground should be selected such that the maximum full-scale voltage of the ADC is reached when the maximum mirrored current is reached. For example, if the maximum monitored cur- rent through the APD is 2mA with a 1V ADC full scale, and the 10:1 mirror is used, then the correct resistor is approximately 5k Ω. If both MIR1 and MIR2 are con- nected together, the correct resistor is 1.6k Ω. The mirror response time is dominated by the amount of capacitance placed on the output. For burst-mode Rx systems where the fastest response times are required (approximately a 50ns time constant), a 3.3pF capacitor and external op amp should be used to buffer the signal sent to the ADC. For continuous mode applications, a 10nF capacitor is all that is required on the output. Current Clamp The DS1842 has a current clamping circuit to protect the APD by limiting the amount of current from MIROUT. There are three methods of current clamping available. 1) Internally Defined Current Limit The device’s current clamp circuit automatically clamps the current when it exceeds ICLAMP. 2) External Shutdown Signal The CLAMP pin can completely shut down the current from MIROUT. The CLAMP pin is active high. 3) Precise Level Set by External Feedback Circuit A feedback circuit is used to control the level applied to the CLAMP pin. Figure 1 shows an example feedback circuit. Thermal Shutdown As a safety feature, the DS1842 has a thermal-shut- down circuit that turns off the MIROUT and MIRIN cur- rents when the internal die temperature exceeds TSHDN. These currents resume after the device has cooled. Switch FET and Diode The DS1842 switching FET is designed to complement the DS1875 controller’s built-in DC-DC boost controller. Other DC-DC converters are also compatible, including the MAX1932. APD biasing of 16V to 76V can be achieved using the DS1842. CLAMP MIR1 REF Figure 1. Current Clamp from Current Feedback |
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