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MAX5055BASA+ Datasheet(PDF) 10 Page - Maxim Integrated Products |
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MAX5055BASA+ Datasheet(HTML) 10 Page - Maxim Integrated Products |
10 / 15 page The logic inputs are high impedance and must not be left floating. If the inputs are left open, OUT_ can go to an undefined state as soon as VDD rises above the UVLO threshold. Therefore, the PWM output from the controller must assume proper state when powering up the device. The MAX5054 has two logic inputs per driver providing greater flexibility in controlling the MOSFET. Use IN_+ for noninverting logic and IN_- for inverting logic operation. Connect IN_+ to VDD and IN_- to GND if not used. Alternatively, the unused input can be used as an ON/OFF function. Use IN_+ for active-low shutdown logic and IN_- for active-high shutdown logic (see Figure 4). See Table 1 for all possible input combinations. Driver Output The MAX5054–MAX5057 have low RDS(ON) p-channel and n-channel devices (totem pole) in the output stage for the fast turn-on and turn-off high gate-charge switch- ing MOSFETs. The peak source or sink current is typically 4A. The OUT_ voltage is approximately equal to VDD when in high state and is ground when in low state. The driver RDS(ON) is lower at higher VDD, thus higher source-/sink-current capability and faster switching speeds. The propagation delays from the noninverting and inverting logic inputs to outputs are matched to 2ns. The break-before-make logic avoids any cross-conduc- tion between the internal p- and n-channel devices, and eliminates shoot-through currents reducing the quiescent supply current. Applications Information RLC Series Circuit The driver’s RDS(ON) (RON), internal bond and lead inductance (LP), trace inductance (LS), gate inductance (LG), and gate capacitance (CG) form a series RLC circuit with a second-order characteristic equation. The series RLC circuit has an undamped natural frequency ( ϖ0) and a damping ratio (ζ) where: The damping ratio needs to be greater than 0.5 (ideally 1) to avoid ringing. Add a small resistor (RGATE) in series with the gate when driving a very low gate-charge MOSFET, or when the driver is placed away from the MOSFET. Use the following equation to calculate the series resistor: LP can be approximated as 3nH and 2nH for SO and TDFN packages, respectively. LS is on the order of 20nH/in. Verify LG with the MOSFET vendor. R LLL C R GATE PSG G ON ≥ ++ − () ϖ ξ 0 1 2 = ++ × = × ++ () () LLL C R LLL C PSG G ON PSG G 4A, 20ns, Dual MOSFET Drivers 10 ______________________________________________________________________________________ MAX5054A VDD GND INA- INA+ OUTA PWM INPUT ON OFF Figure 4. Unused Input as an ON/OFF Function (1/2 MAX5054A) Table 1. MAX5054 Truth Table INA+/INB+ INA-/INB- OUTA/OUTB Low Low Low Low High Low High Low High High High Low Table 2. MAX5055/MAX5056/MAX5057 Truth Table NONINVERTING IN_+ OUT_ Low Low High High INVERTING IN_- OUT_ Low High High Low |
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