The MAX5360/MAX5361/MAX5362 are compatible with

ance inputs; SDA has an open drain that pulls the data

line low during the 9th clock pulse. Figure 7 shows a

general call address is ignored, and CBUS formats are

not supported. The MAX5360/MAX5361/MAX5362

protocol only. No 10-bit formats are supported.

RESTART protocol is supported, but an immediate

STOP condition is necessary to update the DAC.

Applications Information

Digital Inputs and Interface Logic

The serial 2-wire interface has logic levels defined as

include Schmitt-trigger buffers to accept slow-transition

interfaces. This means that optocouplers can interface

directly to the MAX5360/MAX5361/MAX5362 without

additional external logic. The digital inputs are compati-

ble with CMOS logic levels and must not be driven with

Power-Supply Bypassing and Layout

Careful PC board layout is important for best system

performance. To reduce crosstalk and noise injection,

keep analog and digital signals separate. Ensure that

the ground return from GND to the supply ground is

short and low impedance; a ground plane is recom-

as possible to the device. If the supply is excessively

noisy, connect a 10

Ω resistor in series with the supply

Low-Cost, Low-Power 6-Bit DACs with

2-Wire Serial Interface in SOT23 Package

______________________________________________________________________________________

11

μC

SDA SCL

OFFSET ADJUSTMENT

THRESHOLD ADJUSTMENT

GAIN ADJUSTMENT

SCL

SDA

OUT

MAX5360L

2V REFERENCE

SCL

SDA

OUT

MAX5361M

4V REFERENCE

SCL

SDA

OUT

MAX5362P

PROCESS: BiCMOS

Chip Information