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2N3954A_PDIP Datasheet(PDF) 1 Page - Micross Components |
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2N3954A_PDIP Datasheet(HTML) 1 Page - Micross Components |
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1 / 1 page Click To Buy Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. FEATURES LOW DRIFT |∆ VGS1‐2 /∆T|= 5µV/°C max. LOW LEAKAGE IG = 20pA TYP. LOW NOISE en = 10nV/√Hz TYP. ABSOLUTE MAXIMUM RATINGS @ 25°C (unless otherwise noted) Maximum Temperatures Storage Temperature ‐65°C to +200°C Operating Junction Temperature +150°C Maximum Voltage and Current for Each Transistor – Note 1 ‐VGSS Gate Voltage to Drain or Source 60V ‐VDSO Drain to Source Voltage 60V ‐IG(f) Gate Forward Current 50mA Maximum Power Dissipation Device Dissipation @ Free Air – Total 400mW @ 25°C MATCHING CHARACTERISTICS @ 25°C UNLESS OTHERWISE NOTED SYMBOL CHARACTERISTICS VALUE UNITS CONDITIONS | V GS1‐2 / T| max. DRIFT VS. TEMPERATURE 5 µV/°C VDG=20V, ID=200µA TA=‐55°C to +125°C | V GS1‐2 | max. OFFSET VOLTAGE 5 mV VDG=20V, ID=200µA ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted) SYMBOL CHARACTERISTICS MIN. TYP. MAX. UNITS CONDITIONS BVGSS Breakdown Voltage 60 ‐‐ ‐‐ V VDS = 0 ID=1µA BVGGO Gate‐To‐Gate Breakdown 60 ‐‐ ‐‐ V I G= 1nA ID= 0 IS= 0 YfSS TRANSCONDUCTANCE Full Conduction 1000 2000 3000 µmho VDG= 20V VGS= 0V f = 1kHz YfS Typical Operation 500 700 1000 µmho VDG= 20V ID= 200µA |YFS1‐2 / Y FS| Mismatch ‐‐ 0.6 3 % IDSS DRAIN CURRENT Full Conduction 0.5 2 5 mA VDG= 20V VGS= 0V |IDSS1‐2 / IDSS| Mismatch at Full Conduction ‐‐ 1 5 % VGS(off) or Vp GATE VOLTAGE Pinchoff voltage 1 2 4.5 V VDS= 20V ID= 1nA VGS(on) Operating Range 0.5 ‐‐ 4 V VDS=20V ID=200µA ‐IG GATE CURRENT Operating ‐‐ 20 50 pA VDG= 20V ID= 200µA ‐IG High Temperature ‐‐ ‐‐ 50 nA TA= +125°C ‐IG Reduced VDG ‐‐ 5 ‐‐ pA VDG= 10V ID= 200µA ‐IGSS At Full Conduction ‐‐ ‐‐ 100 pA VDG= 20V VDS= 0 YOSS OUTPUT CONDUCTANCE Full Conduction ‐‐ ‐‐ 5 µmho VDG= 20V VGS= 0V YOS Operating ‐‐ 0.1 1 µmho VDG= 20V ID= 200µA |YOS1‐2| Differential ‐‐ 0.01 0.1 µmho CMR COMMON MODE REJECTION ‐20 log | VGS1‐2/ VDS| ‐‐ 100 ‐‐ dB ∆VDS = 10 to 20V ID=200µA CMR ‐20 log | VGS1‐2/ VDS| ‐‐ 75 ‐‐ dB ∆VDS = 5 to 10V ID=200µA NF NOISE Figure ‐‐ ‐‐ 0.5 dB VDS= 20V VGS= 0V RG= 10MΩ f= 100Hz NBW= 6Hz en Voltage ‐‐ ‐‐ 15 nV/√Hz VDS=20V ID=200µA f=10Hz NBW=1Hz CISS CAPACITANCE Input ‐‐ ‐‐ 6 pF VDS= 20V VGS= 0V f= 1MHz CRSS Reverse Transfer ‐‐ ‐‐ 2 pF CDD Drain‐to‐Drain ‐‐ 0.1 ‐‐ pF VDG= 20V ID= 200µA The 2N3954A is a Low Noise, Low Drift, Monolithic Dual N-Channel JFET 2N3954A MONOLITHIC DUAL N-CHANNEL JFET Note 1 – These ratings are limiting values above which the serviceability of any semiconductor may be impaired 2N3954A Applications: Wideband Differential Amps High Input Impedance Amplifiers The 2N3954A family are matched JFET pairs for differential amplifiers. The 2N3954A family of general purpose JFETs is characterized for low and medium frequency differential amplifiers requiring low offset voltage, drift, noise and capacitance The 2N3954A family exhibits low capacitance - 6pF max and a spot noise figure of - 0.5dB max. The part offers a superior tracking ability. The 8 Pin P-DIP and 8 Pin SOIC provide ease of manufacturing, and the symmetrical pinout prevents improper orientation. (See Packaging Information). PDIP / SOIC (Top View) Available Packages: 2N3954A in PDIP / SOIC 2N3954A available as bare die Please contact Micross for full package and die dimensions Micross Components Europe Tel: +44 1603 788967 Email: chipcomponents@micross.com Web: http://www.micross.com/distribution |
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