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BTS5480SF Datasheet(PDF) 9 Page - Infineon Technologies AG |
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BTS5480SF Datasheet(HTML) 9 Page - Infineon Technologies AG |
9 / 59 page SPOC - BTS5480SF Pin Configuration Data Sheet 9 Rev. 1.0, 2010-04-12 3.2 Pin Definitions and Functions Pin Symbol I/O Function Power Supply Pins 1, 2, 9, 28, 35, 36 1) 1) All VBB pins have to be connected. VBB – Positive power supply for high-side power switch 19 VDD – Logic supply (5 V) 15, 22 GND – Ground connection Parallel Input Pins (integrated pull-down, leave unused pins unconnected) 16 IN1 I Input signal of channel 1 (high active) 17 IN2 I Input signal of channel 2 (high active) 18 IN3 I Input signal of channel 3 (high active) Power Output Pins 3, 4, 5, 6 2) 2) All outputs pins of each channel have to be connected. OUT0 O Protected high-side power output of channel 0 31, 32, 33, 34 2) OUT1 O Protected high-side power output of channel 1 29, 30 2) OUT2 O Protected high-side power output of channel 2 7, 8 2) OUT3 O Protected high-side power output of channel 3 SPI & Diagnosis Pins 14 CS I Chip select of SPI interface (low active); Integrated pull up 13 SCLK I Serial clock of SPI interface 12 SI I Serial input of SPI interface (high active) 11 SO O Serial output of SPI interface 21 IS O Current sense output signal Limp Home Pin (integrated pull-down, pull-down resistor recommended) 10 LHI I Limp home activation signal (high active) External Driver Pins (integrated pull-down, leave unused external driver pins unconnected) 26 EDO0 O External driver output for activation of external driver 0 24 EDO1 O External driver output for activation of external driver 1 25 EDD0 O External driver diagnosis enable signal of external driver 0 23 EDD1 O External driver diagnosis enable signal of external driver 1 Not connected Pins 20, 27 n.c. – not connected, internally not bonded |
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