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MCIMX27MJP4A Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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MCIMX27MJP4A Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 152 page  i.MX27 and i.MX27L Data Sheet, Rev. 1.7 6 Freescale Semiconductor Functional Description and Application Information AUDMUX Digital Audio Multiplexer Multimedia Peripheral The AUDMUX interconnections allow multiple, simultaneous audio/voice/data flows between the ports in point-to-point or point-to-multipoint configurations. 2.3.6/11 CRM Clock and Reset Module Clock and Reset Control The CRM generates clock and reset signals used throughout the i.MX27/MX27L processors and also for external peripherals. 2.3.7/12 CSI CMOS Sensor Interface Multimedia Interface The CSI is a logic interface which enables the i.MX27/MX27L processors to connect directly to external CMOS sensors and a CCIR656 video source. 2.3.8/12 CSPI Configurable Serial Peripheral Interface (x3) Connectivity Peripheral The i.MX27/MX27L processors have three CSPI modules. CSPI is equipped with two data FIFOs and is a master/slave configurable serial peripheral interface module, allowing the i.MX27/MX27L processors to interface with both external SPI master and slave devices. 2.3.9/13 DMAC Direct Memory Access Controller Standard System Resource The DMAC of the i.MX27/MX27L processors provides 16 channels supporting linear memory, 2D memory, FIFO and end-of-burst enable FIFO transfers to support a wide variety of DMA operations. 2.3.10/13 eMMA_lt eMMA_lt H/W Accelerator Functions eMMA_lt consists of a PreProcessor and PostProcessor, and provides video acceleration. The PrP and PP can be used for generic video pre and post processing such as scaling, resizing, and color space conversions. 2.3.11/13 EMI External Memory Interface Memory Interface (EMI) The EMI includes • Multi-Master Memory Interface (M3IF) • Enhanced SDRAM/MDDR memory controller (ESDRAMC) • PCMCIA memory controller (PCMCIA) • NAND Flash Controller (NFC) • Wireless External Interface Module (WEIM) — ESDRAMC Enhanced SDRAM Controller External Memory Interface The ESDRAMC provides interface and control for synchronous DRAM memories for the system. 2.3.12/15 FEC Fast Ethernet Controller Connectivity Peripheral The FEC performs the full set of IEEE 802.3/Ethernet CSMA/CD media access control and channel interface functions. The FEC supports connection and functionality for the 10/100 Mbps 802.3 media independent interface (MII). It requires an external transceiver (PHY) to complete the interface to the media. 2.3.13/15 GPIO General Purpose I/O Module Pins The GPIO provides 32 bits of bidirectional, general purpose I/O. This peripheral provides dedicated general-purpose pins that can be configured as either inputs or outputs. 2.3.14/16 GPT General Purpose Timer Timer Peripheral The GPT is a multipurpose module used to measure intervals or generate periodic output. 2.3.15/16 I2C Inter IC Communication Connectivity Peripheral The I2C provides serial interface to control the sensor interface and other external devices. Data rates of up to 100 Kbits/s are supported. 2.3.16/17 Table 2. Digital and Analog Modules (continued) Block Mnemonic Block Name Functional Grouping Brief Description Section/ Page |
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