DP++ MultiModeSourceSideRe-driver; GPUw/ UnifiedDDC & AUXOutputs;

AUX & DDCInternalMuxUtilized; AUXChannelMonitoredforLink Training

HPD

AUXSRC-

AUXSRC+

DDC

GPU

MAIN[3:0]

IN[3:0]

4 diff

4 diff

OUT[3:0]

HPD_SRC

HPD_SNK

AUXSNK-

AUXSNK+

CAD_SNK

SN75DP130

1M

configureoutputsignalconditioningand

EQsettings. 10kW resistorsare

100kW

100kW

3.3V

100kWresistorsshallbeplacedonthe AUXSNKsideto

ensureproperdeviceinternalchannelbiasing, andto

ensurethesinkdeviceidentifiesthesourceduringpower

downconditions.

SCL_CTL

SDA_CTL

I

R

I2C

R

I2C

3.3V

AUX

DDC

DP++ MultiModeSourceSideRe-driver; GPUw/ SeparateDDC & AUXOutputs;

AUX & DDCInternalMuxUtilized; AUXChannelMonitoredforLink Training

AUX

HPD

GPU

MAIN[3:0]

4 diff

DDC

R

DDC

R

DDC

3.3V

I

R

I2C

R

I2C

3.3V

AUXSRC-

AUXSRC+

DDC

IN[3:0]

4 diff

OUT[3:0]

HPD_SRC

HPD_SNK

AUXSNK-

AUXSNK+

CAD_SNK

SN75DP130

1M

100kW

100kW

3.3V

100kWresistorsshallbeplacedonthe AUXSNKsideto

ensureproperdeviceinternalchannelbiasing, andto

ensurethesinkdeviceidentifiesthesourceduringpower

downconditions.

SCL_CTL

SDA_CTL

integrates 60kWpullupsandacableadapter

shouldinclude 2kWpullupforeachline. Ifitis

uncertainifthecableadapterincludes 2kW

fullyconfigureoutputsignal

conditioningandEQsettings. 10kW

SN75DP130

SLLSE57

– APRIL 2011

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

TYPICAL IMPLEMENTATIONS

The configuration shown in Figure 1 supports a GPU with unified AUX/DDC interfaces. This circuit provides back

current protection into the GPU AUX, HPD, and CAD inputs.

Figure 1. DP++ Dual-Mode in a Unified AUX/DDC Configuration

The configuration shown in Figure 2 supports a GPU with separate DDC and AUX interfaces, and overcomes the

need for an external AUX to DDC switch. This circuit provides back current protection into the GPU AUX, HPD,

and CAD inputs.

Figure 2. DP++ Dual-Mode in a Split AUX and DDC Configuration

2

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© 2011, Texas Instruments Incorporated

Product Folder Link(s): SN75DP130