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DRF1203 Datasheet(PDF) 3 Page - Microsemi Corporation |
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DRF1203 Datasheet(HTML) 3 Page - Microsemi Corporation |
3 / 4 page The Function (FN, pin 3) is the invert or non-invert select Pin, it is Internally held high. DRF1203 The Test Circuit illustrated above was used to evaluate the DRF1203 (available as an evaluation Board DRF12XX / EVALSW.) The input control signal is applied to the DRF1203 via IN(4) and SG(5) pins using RG188. This provides excellent noise immunity and control of the signal ground currents. The +V DD inputs (2,6) are by-passed (C1,C2, C4-C9), this is in addition to the internal by-passing mentioned previously. The capacitors used for this function must be capable of supporting the RMS currents and frequency of the gate load. R L set for IDM at VDS max this load is used to evaluate the output performance of the DRF1203. Figure 2, DRF1203 Test Circuit Truth Table *Referenced to SG FN (pin 3)* IN (pin 4)* MOSFET HIGH HIGH ON HIGH LOW OFF LOW HIGH OFF LOW LOW ON |
Similar Part No. - DRF1203_11 |
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Similar Description - DRF1203_11 |
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