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CY8CLED04 Datasheet(PDF) 4 Page - Cypress Semiconductor |
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CY8CLED04 Datasheet(HTML) 4 Page - Cypress Semiconductor |
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4 / 52 page  CY8CLED08 Document Number: 001-12981 Rev. *J Page 4 of 52 1. EZ-Color™ Functional Overview Cypress' EZ-Color family of devices offers the ideal control solution for high brightness LED applications requiring intelligent dimming control. EZ-Color devices combine the power and flexibility of Programmable System-on-Chip (PSoC®). Cypress' precise illumination signal modulation (PrISM™) modulation technology provides lighting designers a fully customizable and integrated lighting solution platform. The EZ-Color family supports a range of independent LED channels from 4 channels at 32 bits of resolution each, up to 16 channels at 8 bits of resolution each. This enables lighting designers the flexibility to choose the LED array size and color quality. PSoC Designer software, with lighting specific drivers, can significantly cut development time and simplify implementation of fixed color points through temperature, optical, and LED binning compensation. EZ-Color's virtually limitless analog and digital customization enable simple integration of features in addition to intelligent lighting, such as battery charging, image stabilization, and motor control during the development process. These features, along with Cypress' best-in-class quality and design support, make EZ-Color the ideal choice for intelligent HB LED control applications. 1.1 Target Applications ■ LCD Backlight ■ Large Signs ■ General Lighting ■ Architectural Lighting ■ Camera/Cell Phone Flash ■ Flashlights 1.2 The PSoC Core The PSoC Core is a powerful engine that supports a rich feature set. The core includes a CPU, memory, clocks, and configurable General Purpose I/O (GPIO). The M8C CPU core is a powerful processor with speeds up to 48 MHz, providing a four MIPS 8-bit Harvard-architecture microprocessor. The CPU uses an interrupt controller with 17 vectors, to simplify programming of real time embedded events. Program execution is timed and protected using the included Sleep and watchdog timers (WDT). Memory encompasses 16K of Flash for program storage, 256 bytes of SRAM for data storage, and up to 2K of EEPROM emulated using the Flash. Program Flash uses four protection levels on blocks of 64 bytes, allowing customized software IP protection. The EZ-Color family incorporates flexible internal clock generators, including a 24 MHz internal main oscillator (IMO) accurate to 2.5% over temperature and voltage. The 24 MHz IMO can also be doubled to 48 MHz for use by the digital system. A low power 32 kHz internal low speed oscillator (ILO) is provided for the Sleep timer and WDT. If crystal accuracy is desired, the external crystal oscillator (ECO) (32.768 kHz ECO) is available for use as a real time clock (RTC) and can optionally generate a crystal-accurate 24 MHz system clock using a PLL. The clocks, together with programmable clock dividers (as a system resource), provide the flexibility to integrate almost any timing requirement into the EZ-Color device. EZ-Color GPIOs provide connection to the CPU, digital, and analog resources of the device. Each pin’s drive mode may be selected from eight options, allowing great flexibility in external interfacing. Every pin also has the capability to generate a system interrupt on high level, low level, and change from last read. 1.3 The Digital System The digital system is composed of 8 digital blocks. Each block is an 8-bit resource that can be used alone or combined with other blocks to form 8-, 16-, 24-, and 32-bit peripherals, which are called user modules. Figure 1-1. Digital System Block Diagram Digital peripheral configurations include the following: ■ PrISM (8- to 32-bit) ■ PWMs (8- to 32-bit) ■ PWMs with dead band (8- to 32-bit) ■ Counters (8- to 32-bit) ■ Timers (8- to 32-bit) ■ UART 8-bit with selectable parity (up to two) ■ SPI slave and master (up to two) ■ I 2C slave and multi-master (one available as a system resource) ■ Cyclical redundancy checker (CRC)/Generator (8- to 32-bit) ■ IrDA (up to two) ■ Generators (8- to 32-bit) DIGITAL SYSTEM To System Bus Digital Clocks From Core Digital PSoC Block Array To Analog System 8 8 8 8 Row 1 DBB10 DBB11 DCB12 DCB13 4 4 Row 0 DBB00 DBB01 DCB02 DCB03 4 4 GIE[7:0] GIO[7:0] GOE[7:0] GOO[7:0] Global Digital Interconnect Port 4 Port 3 Port 2 Port 1 Port 0 Port 5 |
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Similar Description - CY8CLED04 |
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