Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

CY7B994V-5BBC Datasheet(PDF) 7 Page - Cypress Semiconductor

Part # CY7B994V-5BBC
Description  High Speed Multi Phase PLL Clock Buffer
Download  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7B994V-5BBC Datasheet(HTML) 7 Page - Cypress Semiconductor

Back Button CY7B994V-5BBC Datasheet HTML 3Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 4Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 5Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 6Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 7Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 8Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 9Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 10Page - Cypress Semiconductor CY7B994V-5BBC Datasheet HTML 11Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 7 / 18 page
background image
RoboClock
CY7B993V, CY7B994V
Document #: 38-07127 Rev. *J
Page 7 of 18
Time Unit Definition
Selectable skew is in discrete increments of time unit (tU). The
value of a tU is determined by the FS setting and the maximum
nominal output frequency. The equation to be used to determine
the tU value is as follows:
tU = 1/(fNOM*N)
N is a multiplication factor which is determined by the FS setting.
fNOM is nominal frequency of the device. N is defined in Table 3.
Divide and Phase Select Matrix
The Divide and Phase Select Matrix is comprised of five
independent banks: four banks of clock outputs and one bank for
feedback. Each clock output bank has two pairs of low-skew,
high-fanout output buffers ([1:4]Q[A:B][0:1]), two phase function
select inputs ([1:4]F[0:1]), two divider function selects
([1:4]DS[0:1]), and one output disable (DIS[1:4]).
The feedback bank has one pair of low-skew, high-fanout output
buffers (QFA[0:1]). One of these outputs may connect to the
selected feedback input (FBK[A:B]±). This feedback bank also
has one phase function select input (FBF0), two divider function
selects FSDS[0:1], and one output disable (FBDIS).
The phase capabilities that are chosen by the phase function
select pins are shown in Table 4. The divide capabilities for each
bank are shown in Table 5.
Figure 3 illustrates the timing relationship of programmable skew
outputs. All times are measured with respect to REF with the
output used for feedback programmed with 0tU skew. The PLL
naturally aligns the rising edge of the FB input and REF input. If
the output used for feedback is programmed to another skew
position, then the whole tU matrix shifts with respect to REF. For
example, if the output used for feedback is programmed to shift
–8tU, then the whole matrix is shifted forward in time by 8tU. Thus
an output programmed with 8tU of skew is effectively skewed
16tU with respect to REF.
Table 2. Frequency Range Select
FS[2]
CY7B993V
CY7B994V
fNOM (MHz)
fNOM (MHz)
Min
Max
Min
Max
LOW
1226
2452
MID
24
52
48
100
HIGH
48
100
96
200
Table 3. N Factor Determination
FS
CY7B993V
CY7B994V
N
fNOM (MHz) at
which tU =1.0 ns
N
fNOM (MHz) at
which tU =1.0 ns
LOW
64
15.625
32
31.25
MID
32
31.25
16
62.5
HIGH
16
62.5
8
125
Table 4. Output Skew Select Function
Function
Selects
Output Skew Function
[1:4]F1
[1:4]F0
and
FBF0
Bank1 Bank2 Bank3 Bank4
Feed-
back
Bank
LOW
LOW
–4tU
–4tU
–8tU
–8tU
–4tU
LOW
MID
–3tU
–3tu
–7tU
–7tU
NA
LOW
HIGH
–2tU
–2tU
–6tU
–6tU
NA
MID
LOW
–1tU
–1tU
BK1[3] BK1[3]
NA
MID
MID
0tU
0tU
0tU
0tU
0tu
MID
HIGH
+1tU
+1tU
BK2[3] BK2[3]
NA
HIGH
LOW
+2tU
+2tU
+6tU
+6tU
NA
HIGH
MID
+3tU
+3tU
+7tU
+7tU
NA
HIGH
HIGH
+4tU
+4tU
+8tU
+8tU
+4tU
Table 5. Output Divider Function
Function
Selects
Output Divider Function
[1:4]DS1
and
FBDS1
[1:4]DS0
and
FBDS0
Bank1 Bank2 Bank3 Bank4
Feed-
back
Bank
LOW
LOW
/1
/1
/1
/1
/1
LOW
MID
/2
/2
/2
/2
/2
LOW
HIGH
/3
/3
/3
/3
/3
MID
LOW
/4
/4
/4
/4
/4
MID
MID
/5
/5
/5
/5
/5
MID
HIGH
/6
/6
/6
/6
/6
HIGH
LOW
/8
/8/8/8
/8
HIGH
MID
/10
/10
/10
/10
/10
HIGH
HIGH
/12
/12
/12
/12
/12
Notes
2. The level to be set on FS is determined by the “nominal” operating frequency (fNOM) of the VCO and Phase Generator. fNOM always appears on an output when
the output is operating in the undivided mode. The REF and FB are at fNOM when the output connected to FB is undivided.
3. BK1, BK2 denotes following the skew setting of Bank1 and Bank2, respectively.
[+] Feedback


Similar Part No. - CY7B994V-5BBC

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY7B994V-5BBC CYPRESS-CY7B994V-5BBC Datasheet
292Kb / 14P
   High-Speed Multi-Phase PLL Clock Buffer
CY7B994V-5BBC CYPRESS-CY7B994V-5BBC Datasheet
391Kb / 15P
   High-speed Multi-phase PLL Clock Buffer
CY7B994V-5BBCT CYPRESS-CY7B994V-5BBCT Datasheet
391Kb / 15P
   High-speed Multi-phase PLL Clock Buffer
More results

Similar Description - CY7B994V-5BBC

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY7B9945V CYPRESS-CY7B9945V Datasheet
110Kb / 10P
   High-speed Multi-phase PLL Clock Buffer
CY7B994V CYPRESS-CY7B994V Datasheet
292Kb / 14P
   High-Speed Multi-Phase PLL Clock Buffer
CY7B993V CYPRESS-CY7B993V_05 Datasheet
391Kb / 15P
   High-speed Multi-phase PLL Clock Buffer
CY7B9945V CYPRESS-CY7B9945V_07 Datasheet
261Kb / 11P
   High Speed Multi-phase PLL Clock Buffer
CY7B9945V CYPRESS-CY7B9945V_11 Datasheet
430Kb / 15P
   High Speed Multi-phase PLL Clock Buffer
CY7B9930V CYPRESS-CY7B9930V Datasheet
158Kb / 9P
   High-Speed Multi-Frequency PLL Clock Buffer
CY7B9973V CYPRESS-CY7B9973V Datasheet
167Kb / 8P
   High-Speed Multi-Output PLL Clock Buffer
CY7B995 CYPRESS-CY7B995_07 Datasheet
383Kb / 13P
   2.5/3.3V 200-MHz High-Speed Multi-Phase PLL Clock Buffer
CY7B9950 CYPRESS-CY7B9950_07 Datasheet
331Kb / 12P
   2.5/3.3V, 200 MHz High-Speed Multi-Phase PLL Clock Buffer
CY7B9950 CYPRESS-CY7B9950_06 Datasheet
296Kb / 10P
   2.5/3.3V, 200-MHz High-Speed Multi-Phase PLL Clock Buffer
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com