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CY7C1011CV33-12BVXE Datasheet(PDF) 1 Page - Cypress Semiconductor |
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CY7C1011CV33-12BVXE Datasheet(HTML) 1 Page - Cypress Semiconductor |
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1 / 17 page  CY7C1011CV33 2-Mbit (128 K × 16) Static RAM Cypress Semiconductor Corporation • 198 Champion Court • San Jose , CA 95134-1709 • 408-943-2600 Document Number: 38-05232 Rev. *L Revised June 7, 2011 2-Mbit (128 K × 16) Static RAM Features ■ Temperature ranges ❐ Industrial: –40 °C to 85 °C ❐ Automotive-A: –40 °C to 85 °C ❐ Automotive-E: –40 °C to 125 °C ■ Pin and function compatible with CY7C1011BV33 ■ High speed ❐ tAA = 10 ns (Industrial and Automotive-A) ❐ tAA = 12 ns (Automotive-E) ■ Low active power ❐ 360 mW (max) (Industrial and Automotive-A) ■ 2.0 V data retention ■ Automatic power down when deselected ■ Independent control of upper and lower bits ■ Easy memory expansion with Chip Enable (CE) and Output Enable (OE) features ■ Available in Pb-free 44-pin thin small outline package (TSOP) II, 44-pin thin quad flat package (TQFP), and non Pb-free 48-ball very fine-pitch ball grid array (VFBGA) packages Functional Description The CY7C1011CV33 is a high performance complementary metal oxide semiconductor (CMOS) static RAM organized as 131,072 words by 16 bits. This device has an automatic power down feature that significantly reduces power consumption when deselected. To write to the device, take CE and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is written into the location specified on the address pins (A0 through A16). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O8 through I/O15) is written into the location specified on the address pins (A0 through A16). To read from the device, take CE and OE LOW while forcing the Write Enable (WE) HIGH. If BLE is LOW, then data from the memory location specified by the address pins appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory appears on I/O8 to I/O15. For more information, see the Truth Table on page 10 for a complete description of Read and Write modes. The input and output pins (I/O0 through I/O15) are placed in a high impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW and WE LOW). 128 K x 16 RAM Array I/O0–I/O7 A0 A1 A2 A3 A6 COLUMN DECODER INPUT BUFFER OE A4 A5 I/O8–I/O15 WE BLE BHE A8 A7 CE Logic Block Diagram [+] Feedback |
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