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MC68332ACFV20 Datasheet(PDF) 5 Page - Motorola, Inc |
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MC68332ACFV20 Datasheet(HTML) 5 Page - Motorola, Inc |
5 / 88 page MC68332 MOTOROLA MC68332TS/D 5 1.1 Features • Central Processing Unit (CPU32) — 32-Bit Architecture — Virtual Memory Implementation — Table Lookup and Interpolate Instruction — Improved Exception Handling for Controller Applications — High-Level Language Support — Background Debugging Mode — Fully Static Operation • System Integration Module (SIM) — External Bus Support — Programmable Chip-Select Outputs — System Protection Logic — Watchdog Timer, Clock Monitor, and Bus Monitor — Two 8-Bit Dual Function Input/Output Ports — One 7-Bit Dual Function Output Port — Phase-Locked Loop (PLL) Clock System • Time Processor Unit (TPU) — Dedicated Microengine Operating Independently of CPU32 — 16 Independent, Programmable Channels and Pins — Any Channel can Perform any Time Function — Two Timer Count Registers with Programmable Prescalers — Selectable Channel Priority Levels • Queued Serial Module (QSM) — Enhanced Serial Communication Interface — Queued Serial Peripheral Interface — One 8-Bit Dual Function Port • Static RAM Module with TPU Emulation Capability (TPURAM) — 2-Kbytes of Static RAM — May be Used as Normal RAM or TPU Microcode Emulation RAM |
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