CY8C20X36A_10 datasheet(6/43 Pages) CYPRESS

Part #	CY8C20X36A

Description	CapSense Applications Operating Range: 1.71 V to 5.5 V

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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6 / 43 page

CY8C20X36A/46A/66A/96A

Document Number: 001-54459 Rev. *E

Page 6 of 43

Designing with PSoC Designer

The development process for the PSoC device differs from that

of a traditional fixed function microprocessor. The configurable

analog and digital hardware blocks give the PSoC architecture a

unique flexibility that pays dividends in managing specification

change during development and by lowering inventory costs.

These configurable resources, called PSoC blocks, have the

ability to implement a wide variety of user-selectable functions.

The PSoC development process is summarized in the following

four steps:

1. Select components

2. Configure components

3. Organize and connect

4. Generate, verify, and debug

Select Components

PSoC Designer provides a library of prebuilt, pretested hardware

peripheral components. These components are called user

modules. User modules make selecting and implementing

peripheral devices simple, and come in analog, digital, and

programmable system-on-chip varieties.

Configure Components

Each of the components you select establishes the basic register

settings that implement the selected function. They also provide

parameters and properties that allow you to tailor their precise

configuration to your particular application. For example, a Timer

User Module configures one digital PSoC block. The user

module parameters permit you to establish the period, mode,

and timer clock. Configure the parameters and properties to

correspond to your chosen application. Enter values directly or

by selecting values from drop-down menus.

User modules are documented in datasheets that are viewed

directly in PSoC Designer. These datasheets explain the internal

operation of the component and provide performance

specifications. Each datasheet describes the use of each user

module parameter and other information you may need to

successfully implement your design.

Organize and Connect

You build signal chains by interconnecting user modules to each

other and the I/O pins. You perform the selection, configuration,

and routing so that you have complete control over the use of all

on-chip resources.

Generate, Verify, and Debug

When you are ready to test the hardware configuration or move

to developing code for the project, you perform the ‘Generate

Configuration Files’ step. This causes PSoC Designer to

generate source code that automatically configures the device to

your specification and provides the software for the system.

Based on your design, software is generated. Application

programming interfaces (APIs) are provided with high level

functions to control and respond to hardware events at run time

and interrupt service routines that you can adapt as needed.

A complete code development environment allows you to

develop and customize your applications in C, assembly

language, or both. The last step in the development process

takes place inside PSoC Designer’s Debugger (access by

clicking the Connect icon). PSoC Designer downloads the HEX

image to the ICE where it runs at full speed. PSoC Designer

debugging capabilities rival those of systems costing many times

more. In addition to traditional single-step, run-to-breakpoint and

watch-variable features, the debug interface provides a large

trace buffer and allows you to define complex breakpoint events

that include monitoring address and data bus values, memory

locations and external signals.

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