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CY8C24X23A Datasheet(PDF) 11 Page - Cypress Semiconductor

Part # CY8C24X23A
Description  PSoC Programmable System-on-Chip Low power at high speed
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C24X23A Datasheet(HTML) 11 Page - Cypress Semiconductor

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CY8C21123, CY8C21223, CY8C21323
Document Number: 38-12022 Rev. *Q
Page 11 of 43
24-Pin Part Pinout
Table 6. Pin Definitions – CY8C21323 24-Pin QFN[5]
Pin
No.
Type
Pin
Name
Description
Figure 7. CY8C21323 24-Pin QFN
Digital
Analog
1
I/O
I
P0[1]
Analog column mux input
2
Power
SMP
SMP connection to required external
components
3
Power
VSS
Ground connection
4
I/O
P1[7]
I2C SCL
5
I/O
P1[5]
I2C SDA
6
I/O
P1[3]
7
I/O
P1[1]
I2C SCL, ISSP-SCLK[3]
8
NC
No connection
9
Power
VSS
Ground connection
10
I/O
P1[0]
I2C SDA, ISSP-SDATA[3]
11
I/O
P1[2]
12
I/O
P1[4]
Optional (EXTCLK) input
13
I/O
P1[6]
14
Input
XRES
Active high external reset with internal
pull-down
15
NC
No connection
16
I/O
I
P0[0]
Analog column mux input
17
I/O
I
P0[2]
Analog column mux input
18
I/O
I
P0[4]
Analog column mux input
19
I/O
I
P0[6]
Analog column mux input
20
Power
VDD
Supply voltage
21
Power
VSS
Ground connection
22
I/O
I
P0[7]
Analog column mux input
23
I/O
I
P0[5]
Analog column mux input
24
I/O
I
P0[3]
Analog column mux input
LEGEND A = Analog, I = Input, and O = Output.
QFN
(Top View)
A, I, P0[1]
SMP
VSS
I2C SCL, P1[7]
I2C SDA, P1[5]
P1[3]
1
2
3
4
5
6
18
17
16
15
14
13
P0[4], A, I
P0[2], A, I
NC
XRES
P1[6]
P0[0], A, I
Note
5. The center pad on the QFN package must be connected to ground (VSS) for best mechanical, thermal, and electrical performance. If not connected to ground, it
must be electrically floated and not connected to any other signal.
[+] Feedback


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