CY8CLED16

Document Number: 001-13105 Rev. *H

Page 10 of 53

Table 3. 48-Pin Part Pinout (QFN)[2]

Pin

No.

Type

Pin

Name

Description

Figure 4. 48-Pin Device

Digital

Analog

1

I/O

I

P2[3]

Direct switched capacitor block input.

2

I/O

I

P2[1]

Direct switched capacitor block input.

3

I/O

P4[7]

4

I/O

P4[5]

5

I/O

P4[3]

6

I/O

P4[1]

7

Power

SMP

Switch mode pump (SMP) connection to external

components required.

8

I/O

P3[7]

9

I/O

P3[5]

10

I/O

P3[3]

11

I/O

P3[1]

12

I/O

P5[3]

13

I/O

P5[1]

14

I/O

P1[7]

15

I/O

P1[5]

16

I/O

P1[3]

17

I/O

P1[1]

ISSP-SCLK[1].

18

Power

Vss

Ground connection.

19

I/O

P1[0]

ISSP-SDATA[1].

20

I/O

P1[2]

21

I/O

P1[4]

optional external clock input (EXTCLK).

22

I/O

P1[6]

23

I/O

P5[0]

24

I/O

P5[2]

25

I/O

P3[0]

26

I/O

P3[2]

27

I/O

P3[4]

28

I/O

P3[6]

29

Input

XRES

Active high external reset with internal pull-down.

30

I/O

P4[0]

31

I/O

P4[2]

32

I/O

P4[4]

33

I/O

P4[6]

34

I/O

I

P2[0]

Direct switched capacitor block input.

35

I/O

I

P2[2]

Direct switched capacitor block input.

36

I/O

P2[4]

external analog ground (AGND).

37

I/O

P2[6]

external voltage reference (VREF).

38

I/O

I

P0[0]

Analog column mux input.

39

I/O

I/O

P0[2]

Analog column mux input and column output.

40

I/O

I/O

P0[4]

Analog column mux input and column output.

41

I/O

I

P0[6]

Analog column mux input.

42

Power

Supply voltage.

43

I/O

I

P0[7]

Analog column mux input.

44

I/O

I/O

P0[5]

Analog column mux input and column output.

45

I/O

I/O

P0[3]

Analog column mux input and column output.

46

I/O

I

P0[1]

Analog column mux input.

47

I/O

P2[7]

48

I/O

P2[5]

LEGEND: A = Analog, I = Input, and O = Output.

MLF

(Top View)

10

11

12

A, I, P2[3]

A, I, P2[1]

P4[7]

P4[5]

P4[3]

P4[1]

SMP

P3[7]

P3[5]

P3[3]

P3[1]

P5[3]

35

34

33

32

31

30

29

28

27

26

25

36

P2[2], A, I

P2[0], A, I

P4[6]

P4[4]

P4[2]

P4[0]

XRES

P3[6]

P3[4]

P3[2]

P3[0]

P2[4], External AGND

1

2

3

4

5

6

7

8

9

Note

2. The center pad on the QFN package should be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it

should be electrically floated and not connected to any other signal.