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CY22801 Datasheet(PDF) 11 Page - Cypress Semiconductor |
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CY22801 Datasheet(HTML) 11 Page - Cypress Semiconductor |
11 / 23 page CY22801 Document #: 001-15571 Rev. *E Page 11 of 23 Application Guideline Best Practices for Best Jitter Performance Jitter can be specified in different terminologies: Time Domain: ■ Cycle-to-cycle jitter ■ Period jitter ■ Long-term jitter Frequency domain: ■ Deterministic jitter ■ Random jitter ■ Phase noise These jitter terms are usually given in terms of root mean square (RMS), peak-to-peak, or in the case of phase noise, dBC/Hz with respect to fundamental frequency. Cycle-to-cycle and period jitter are generally used terminologies. Jitter depends on many factors and few of the them can be controlled in application: ■ Input reference jitter ■ Number of active clock outputs ■ Operating temperature ■ Clock output load ■ PLL frequencies ■ Termination and layout ■ Supply voltage accuracy Jitter is directly proportional to the input reference jitter, number of active clock outputs, operating temperature and clock output load, but inversely proportional to the PLL frequency. Best practices for termination, layout and supply voltage filtering are discussed in application note “Layout and Termination Techniques For Cypress Clock Generators-AN1111”. Field Programming the CY22801 The CY22801 is programmed using the CY36800 USB programmer dongle. The CY22801 is flash-technology based, so the parts are reprogrammed up to 100 times. This enables fast and easy design changes and product updates, and eliminates any issues with old and out-of-date inventory. Samples and small prototype quantities are programmed using the CY36800 programmer. Cypress’s value-added distribution partners and third-party programming systems from BP Microsystems, HiLo Systems, and others, are available for large production quantities. CyClocksRT Software CyClocksRT is an easy-to-use software application that enables the user to custom-configure the CY22801. Users can specify the XIN/CLKIN frequency, crystal load capacitance, and output frequencies. CyClocksRT then creates an industry-standard JEDEC file that is used to program the CY22801. When needed, an advanced mode is available that enables users to override the automatically generated voltage controlled oscillator (VCO) frequency and output divider values. CyClocksRT is a component of the CyberClocks™ software that you can download free of charge from the Cypress website at http://www.cypress.com. CY36800 InstaClock™ Kit The Cypress CY36800 InstaClock kit comes with everything needed to design the CY22801 and program samples and small prototype quantities. The CyClocksRT software is used to quickly create a JEDEC programming file, which is then downloaded directly to the portable programmer that is included in the CY36800 InstaClock kit. The JEDEC file can also be saved for use in a production programming system for larger volumes. The CY36800 also comes with five samples of the CY22801, which are programmed with preconfigured JEDEC files using the InstaClock software. Possible Configuration Examples Contact your local Cypress field application engineer for functional feasibility and custom configuration with these advanced features. Table 16. Possible Configuration Possible Configurations Pin#1 Pin#3 Pin#5 Pin#6 Pin#7 Pin#8 A CLKIN:33 MHz OE CLKB: 33 MHz CLKA:100 MHz with +/-1% Spread SSON NC BXIN:27 MHz crystal VCXO PD# CLKA: 74.25 /74.175824 MHz FS2 XOUT: 27 MHz crystal C CLKIN:10 MHz OE FS1 CLKA: 25/40/33.3333/50 MHz FS2 NC D CLKIN:10 MHz SDAT SCLK CLKA CLKB NC [+] Feedback |
Similar Part No. - CY22801_11 |
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Similar Description - CY22801_11 |
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