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CY62136FV30LL-45BVXI Datasheet(PDF) 6 Page - Cypress Semiconductor |
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CY62136FV30LL-45BVXI Datasheet(HTML) 6 Page - Cypress Semiconductor |
6 / 16 page CY62136FV30 MoBL® Document Number: 001-08402 Rev. *J Page 6 of 16 Data Retention Characteristics Over the Operating Range Parameter Description Conditions Min Typ [10] Max Unit VDR VCC for data retention 1.5 – – V ICCDR [11] Data retention current VCC = 1.5 V, CE > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V Industrial/ Automotive-A –– 4 A Automotive-E – – 12 tCDR [12] Chip deselect to data retention time 0– – ns tR [13] Operation recovery time CY62136FV30LL-45 45 – – ns CY62136FV30LL-55 55 – – Data Retention Waveform Figure 4. Data Retention Waveform [14] VCC(min) VCC(min) tCDR VDR > 1.5 V DATA RETENTION MODE tR VCC CE or BHE.BLE Notes 10. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 11. Chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB1/ ISB2 / ICCDR specification. Other inputs can be left floating. 12. Tested initially and after any design or process changes that may affect these parameters. 13. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 s or stable at VCC(min) > 100 s. 14. BHE.BLE is the AND of both BHE and BLE. Deselect the chip by either disabling chip enable signals or by disabling both BHE and BLE. [+] Feedback |
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