High-Efficiency, 8A, Current-Mode Synchronous

Step-Down Switching Regulator with VID Control

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Programmable Soft-Start (SS)

The IC utilizes a soft-start feature to slowly ramp up the

regulated output voltage to reduce input inrush current

during startup. Connect a capacitor from SS to PGND to

set the startup time. See the Output Voltage Transition

Timing section for capacitor selection details.

Error Amplifier

A high-gain error amplifier provides accuracy for the

voltage feedback loop regulation. Connect a compen-

sation network between COMP and SGND. See the

Compensation Design Guidelines section. The error

amplifier transconductance is 1.4mS. COMP clamp low

is set to 0.8V, just below the PWM ramp compensation

valley, helping COMP to rapidly return to the correct set

point during load and line transients.

PWM Comparator

The PWM comparator compares COMP voltage to the

current-derived ramp waveform (LX current to COMP

voltage transconductance value is 25A/V). To avoid

instability due to subharmonic oscillations when the duty

cycle is around 50% or higher, a compensation ramp

is added to the current-derived ramp waveform. The

compensation ramp slope (0.3V x 1MHz = 0.3V/Fs) is

equivalent to half of the inductor current down-slope in

the worst case (load 2A, current ripple 30% and maxi-

mum duty-cycle operation of 95%). The compensation

ramp valley is set to 1V.

Overcurrent Protection and Hiccup

When the converter output is connected to ground or the

device is overloaded, each high-side MOSFET current-

limit event (14A) turns off the high-side MOSFET and

turns on the low-side MOSFET. A 3-bit counter incre-

ments on each current-limit event. The counter is reset

after three consecutive events of high-side MOSFET

turn-on without reaching the current limit. If the current-

limit condition persists, the counter fills up reaching eight

events. The control logic then discharges SS, stops both

high-side and low-side MOSFETs and waits for a hiccup

period (1024 clock cycles) before attempting a new soft-

start sequence. The hiccup-mode also operates during

soft-start.

Thermal Shutdown Protection

The IC contains an internal thermal sensor that limits the

total power dissipation to protect it in the event of an

extended thermal fault condition. When the die tempera-

ture exceeds +160NC, the thermal sensor shuts down

the device, turning off the DC-DC converter to allow the

die to cool. After the die temperature falls by 25NC, the

device restarts, following the soft-start sequence.

Skip Mode Operation

The IC operates in skip mode. When in skip mode, LX

output becomes high impedance when the inductor

current falls below 0.7A. The inductor current does not

become negative. During a clock cycle, if the inductor

current falls below the 0.7A threshold (during off-time),

the low side turns off. At the next clock cycle, if the

output voltage is above the set point the PWM logic

keeps both high-side and low-side MOSFETs off. If

instead the output voltage is below the set point, the

PWM logic drives the high-side on for a minimum fixed

on-time (330ns). In this way, the system skips cycles,

reducing the frequency of operations, and switches only

as needed to service load at the cost of an increase in

output-voltage ripple. See the Skip Mode Frequency

and Output Ripple section for details. In skip mode,

power dissipation is reduced and efficiency improved at

light loads because the internal power MOSFETs do not

switch at every clock cycle.