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MAX14585/MAX14585A

Hi-Speed USB and Audio Switches with Negative Signal

Figure 6. IEC 61000-4-2 ESD Test Model

Figure 7. IEC 61000-4-2 ESD Generator Current Waveform

IEC 61000-4-2

The IEC 61000-4-2 standard covers ESD testing and

performance of finished equipment. It does not spe-

cifically refer to integrated circuits. The major difference

between tests done using the HBM and IEC 61000-4-2

is higher peak current in IEC 61000-4-2, because series

resistance is lower in the IEC 61000-4-2 model. Hence,

the ESD withstand voltage measured to IEC 61000-4-2

is generally lower than that measured using the HBM.

Figure 6 shows the IEC 61000-4-2 model and Figure 7

shows the current waveform for the Q8kV, IEC 61000-4-2,

Level 4, ESD Contact-Discharge Method.

Layout

Hi-Speed USB requires careful PCB layout with 45I

single-ended/90I differential controlled-impedance

matched traces of equal lengths. Ensure that bypass

capacitors are as close to the device as possible. Use

large ground planes where possible.

Note: All devices are specified over the -40°C to +85°C tem-

perature range.

+Denotes a lead(Pb)-free/RoHS-compliant package.

T = Tape and reel.

Ordering Information/

Selector Guide

Chip Information

PROCESS: BiCMOS

Package Information

For the latest package outline information and land patterns

“+”, “#”, or “-” in the package code indicates RoHS status only.

Package drawings may show a different suffix character, but

the drawing pertains to the package regardless of RoHS status.

PART

TOP

MARK

SHUNT

RESISTOR

PIN-

PACKAGE

MAX14585EVB+T

AAY

Yes

10 UTQFN

MAX14585AEVB+T

AAZ

No

10 UTQFN

PACKAGE

TYPE

PACKAGE

CODE

OUTLINE

NO.

LAND

PATTERN NO.

10 UTQFN

V101A1CN+1

21-0028

90-0287

CHARGE CURRENT

LIMIT RESISTOR

DISCHARGE

RESISTANCE

STORAGE

CAPACITOR

150pF

50M

Ω TO 100MΩ

330

Ω

HIGH-

VOLTAGE

DC

SOURCE

DEVICE

UNDER

TEST

30ns

60ns

t

100%

90%

10%

I