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PCA9306GD1 Datasheet(PDF) 11 Page - NXP Semiconductors |
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PCA9306GD1 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 26 page PCA9306 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 6 — 25 November 2010 11 of 26 NXP Semiconductors PCA9306 Dual bidirectional I2C-bus and SMBus voltage-level translator [1] +10 % to compensate for VCC range and resistor tolerance. 11.2.1 Maximum frequency calculation The maximum frequency is totally dependent upon the specifics of the application and the device can operate > 33 MHz. Basically, the PCA9306 behaves like a wire with the additional characteristics of transistor device physics and should be capable of performing at higher frequencies if used correctly. Here are some guidelines to follow that will help maximize the performance of the device: • Keep trace length to a minimum by placing the PCA9306 close to the processor. • The trace length should be less than half the time of flight to reduce ringing and reflections. • The faster the edge of the signal, the higher the chance for ringing. • The higher the drive strength (up to 15 mA), the higher the frequency the device can use. In a 3.3 V to 1.8 V direction level shift, if the 3.3 V side is being driven by a totem pole type driver no pull-up resistor is needed on the 3.3 V side. The capacitance and line length of concern is on the 1.8 V side since it is driven through the ON resistance of the PCA9306. If the line length on the 1.8 V side is long enough there can be a reflection at the chip/terminating end of the wire when the transition time is shorter than the time of flight of the wire because the PCA9306 looks like a high-impedance compared to the wire. If the wire is not too long and the lumped capacitance is not excessive the signal will only be slightly degraded by the series resistance added by passing through the PCA9306. If the lumped capacitance is large the rise time will deteriorate, the fall time is much less affected and if the rise time is slowed down too much the duty cycle of the clock will be degraded and at some point the clock will no longer be useful. So the principle design consideration is to minimize the wire length and the capacitance on the 1.8 V side for the clock path. A pull-up resistor on the 1.8 V side can also be used to trade a slower fall time for a faster rise time and can also reduce the overshoot in some cases. Table 10. Pull-up resistor values Calculated for VOL = 0.35 V; assumes output driver VOL = 0.175 V at stated current. Vpu(D) Pull-up resistor value ( Ω) 15 mA 10 mA 3mA Nominal +10 %[1] Nominal +10 %[1] Nominal +10 %[1] 5 V 310 341 465 512 1550 1705 3.3 V 197 217 295 325 983 1082 2.5 V 143 158 215 237 717 788 1.8 V 97 106 145 160 483 532 1.5 V 77 85 115 127 383 422 1.2 V 57 63 85 94 283 312 |
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