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MSP430L092SPW Datasheet(PDF) 9 Page - Texas Instruments |
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MSP430L092SPW Datasheet(HTML) 9 Page - Texas Instruments |
9 / 44 page MSP430L092 MSP430C09x www.ti.com SLAS673 – SEPTEMBER 2010 Special Function Registers (SFRs) The MSP430 SFRs are located in the lowest address space and can be accessed via word or byte formats. Legend rw: Bit can be read and written. rw-0,1: Bit can be read and written. It is reset or set by PUC. rw-(0,1): Bit can be read and written. It is reset or set by POR. SFR bit is not present in device. Interrupt Enable 1 15 14 13 12 11 10 9 8 SVMIE r0 r0 r0 r0 r0 r0 r0 rw-0 7 6 5 4 3 2 1 0 JMBOUTIE JMBINIE NMIIE VMAIE OFIE WDTIE rw-0 rw-0 r0 rw-0 rw-0 r0 rw-0 rw-0 SVMIE SVM interrupt enable JMBOUTIE JMBINIE NMIIE Nonmaskable-interrupt enable VMAIE Vacant memory access interrupt enable OFIE WDTIE Watchdog-timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer is configured as a general-purpose timer. Interrupt Enable 2 15 14 13 12 11 10 9 8 SVMIFG r0 r0 r0 r0 r0 r0 r0 rw-0 7 6 5 4 3 2 1 0 JMBOUTIFG JMBINIFG NMIIFG VMAIFG OFIFG WDTIFG rw-0 rw-0 r0 rw-0 rw-0 r0 rw-0 rw-0 SVMIFG Set by SVM when voltage falls below set voltage JMBOUTIFG JMBINIFG NMIIFG Set via RST/NMI pin VMAIFG Set on vacant memory access OFIFG WDTIFG Set on watchdog timer overflow (in watchdog mode) or security key violation Reset on VCC power-on or a reset condition at the RST/NMI pin in reset mode Copyright © 2010, Texas Instruments Incorporated Submit Documentation Feedback 9 |
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