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MSP430F1232IDW Datasheet(PDF) 5 Page - Texas Instruments |
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MSP430F1232IDW Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 52 page  MSP430x11x2, MSP430x12x2 MIXED SIGNAL MICROCONTROLLER SLAS361D − JANUARY 2002 − REVISED AUGUST 2004 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions, MSP430x11x2 TERMINAL I/O DESCRIPTION NAME DW & PW RHB I/O DESCRIPTION P1.0/TACLK/ ADC10CLK 13 21 I/O General-purpose digital I/O pin/Timer_A, clock signal TACLK input/conversion clock—10-bit ADC P1.1/TA0 14 22 I/O General-purpose digital I/O pin/Timer_A, capture: CCI0A input, compare: Out0 output/BSL transmit P1.2/TA1 15 23 I/O General-purpose digital I/O pin/Timer_A, capture: CCI1A input, compare: Out1 output P1.3/TA2 16 24 I/O General-purpose digital I/O pin/Timer_A, capture: CCI2A input, compare: Out2 output P1.4/SMCLK/TCK 17 25 I/O General-purpose digital I/O pin/SMCLK signal output/test clock, input terminal for device programming and test P1.5/TA0/TMS 18 26 I/O General-purpose digital I/O pin/Timer_A, compare: Out0 output/test mode select, input terminal for device programming and test P1.6/TA1/TDI/TCLK 19 27 I/O General-purpose digital I/O pin/Timer_A, compare: Out1 output/test data input terminal or test clock input P1.7/TA2/TDO/TDI† 20 28 I/O General-purpose digital I/O pin/Timer_A, compare: Out2 output/test data output terminal or data input during programming P2.0/ACLK/A0 8 6 I/O General-purpose digital I/O pin/ACLK output/analog input to 10-bit ADC input A0 P2.1/INCLK/A1 9 7 I/O General-purpose digital I/O pin/Timer_A, clock signal at INCLK/analog input to 10-bit ADC input A1 P2.2/TA0/A2 10 8 I/O General-purpose digital I/O pin/Timer_A, capture: CCI0B input, compare: Out0 output/analog input to 10-bit ADC input A2/BSL receive P2.3/TA1/A3/VREF−/ VeREF− 11 18 I/O General-purpose digital I/O pin/Timer_A, capture: CCI1B input, compare: Out1 output/analog input to 10-bit ADC input A3/negative reference voltage terminal. P2.4/TA2/A4/VREF+/ VeREF+ 12 19 I/O General-purpose digital I/O pin/Timer_A, compare: Out2 output/analog input to 10-bit ADC input A4/I/O of positive reference voltage terminal P2.5/ROSC 3 32 I/O General-purpose digital I/O pin/Input for external resistor that defines the DCO nominal frequency RST/NMI 7 5 I Reset or nonmaskable interrupt input TEST 1 29 I Selects test mode for JTAG pins on P1.x VCC 2 30 Supply voltage VSS 4 1 Ground reference XIN 6 3 I Input terminal of crystal oscillator XOUT 5 2 O Output terminal of crystal oscillator NC NA 4,17,20,31 Not connected internally. Recommended connection to VSS. Reserved NA 9 - 16 Reserved pins. Recommended connection to VSS to avoid floating nodes, otherwise increased current consumption may occur. QFN Pad NA Package Pad QFN package pad connection to VSS recommended. † TDO or TDI is selected via JTAG instruction. |
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