MSP430x31x

MIXED SIGNAL MICROCONTROLLERS

SLAS165D − FEBRUARY 1998 − REVISED APRIL 2000

5

POST OFFICE BOX 655303

POST OFFICE BOX 1443

Terminal Functions

MSP430C311S, MSP430P315S

48-pin SSOP package

TERMINAL

I/O

DESCRIPTION

NAME

NO.

I/O

DESCRIPTION

CIN

24

I

Counter enable. CIN input enables counter (TPCNT1) (timer/port).

COM0 − COM3

44 − 47

O

Common output pins, COM0 − COM3 are used for LCD back planes.

P0.1/RXD

12

I/O

General-purpose digital I/O pin, receive data input port − 8-Bit (timer/counter)

P0.2/TXD

13

I/O

General-purpose digital I/O pin, transmit data output port − 8-Bit (timer/counter)

P0.3

14

I/O

General-purpose digital I/O pins, bit 3

P0.4

15

I/O

General-purpose digital I/O pins, bit 4

P0.5

16

I/O

General-purpose digital I/O pins, bit 5

P0.6

17

I/O

General-purpose digital I/O pins, bit 6

R23

8

I

Input of second positive analog LCD level (V2) (LCD)

R13

9

I

Input of third positive analog LCD level (V3 of V4) (LCD)

RST/NMI

4

I

Reset input or nonmaskable interrupt input

S2/O2 − S5/O5

25 − 28

O

Segment lines (S2 to S5) or digital output port O2 to O5, group 1 (LCD)

S6/O6 − S9/O9

29 − 32

O

Segment lines (S6 to S9) or digital output port O6 to O9, group 2 (LCD)

S10/O10 − S13/O13

33 − 36

O

Segment lines (S10 to S13) or digital output port O10 to O13, group 3 (LCD)

S14/O14 − S16/O16

37 − 39

O

Segment lines (S14 to S17) or digital output port O14 to O17, group 4 (LCD)

S27/O27/CMPI

43

I/O

Segment line (S27) or digital output port O27 group 7, can be used as a comparator input port CMPI

(timer/port)

TCK

3

I

Test clock. TCK is a clock input terminal for device programming and test.

TDI/VPP

1

I

Test data input port. TDI/VPP is used as a data input terminal or an input for programming voltage.

TDO/TDI

48

I/O

Test data output port. TDO/TDI is used as a data output terminal or as a data input during

programming.

TMS

2

I

Test mode select. TMS is an input terminal for device programming and test.

TP0.0

19

O/Z

General-purpose 3-state digital output port, bit 0 (timer/port)

TP0.1

20

O/Z

General-purpose 3-state digital output port, bit 1 (timer/port)

TP0.2

21

O/Z

General-purpose 3-state digital output port, bit 2 (timer/port)

TP0.3

22

O/Z

General-purpose 3-state digital output port, bit 3 (timer/port)

TP0.5

23

I/O/Z

General-purpose 3-state digital I/O pin, bit 5 (timer/port)

7

Supply voltage

6, 41

Ground references

XBUF

5

O

Clock signal output of system clock (MCLK) or crystal clock (ACLK)

Xin

10

I

Input terminal of crystal oscillator

Xout/TCLK

11

I/O

Output terminal of crystal oscillator or test clock input