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SC1163CSW Datasheet(PDF) 9 Page - Semtech Corporation |
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SC1163CSW Datasheet(HTML) 9 Page - Semtech Corporation |
9 / 12 page PROGRAMMABLE SYNCHRONOUS DC/DC CONVERTER WITH LOW DROPOUT REGULATOR CONTROLLER SC1162/3 © 1999 SEMTECH CORP. October 25, 1999 652 MITCHELL ROAD NEWBURY PARK CA 91320 9 Vout 5V + + 4) The Output Capacitor(s) (Cout) should be located as close to the load as possible, fast transient load currents are supplied by Cout only, and connections between Cout and the load must be short, wide cop- per areas to minimize inductance and resistance. 5) The SC1162/3 is best placed over a quite ground plane area, avoid pulse currents in the Cin, Q1, Q2 loop flowing in this area. PGNDH and PGNDL should be returned to the ground plane close to the package. The AGND pin should be connected to the ground side of (one of) the output capacitor(s). If this is not possible, the AGND pin may be connected to the ground path between the Output Capacitor(s) and the Cin, Q1, Q2 loop. Under no circumstances should AGND be returned to a ground inside the Cin, Q1, Q2 loop. 6) Vcc for the SC1162/3 should be supplied from the 5V supply through a 10 Ω resistor, the Vcc pin should be decoupled directly to AGND by a 0.1 µF ceramic capacitor, trace lengths should be as short as possi- ble. 7) The Current Sense resistor and the divider across it should form as small a loop as possible, the traces running back to CS+ and CS- on the SC1162/3 should run parallel and close to each other. The 0.1 µF ca- pacitor should be mounted as close to the CS+ and CS- pins as possible. 8) Ideally, the ground for the LDO section should be returned to the ground side of (one of) the switching section output capacitor(s). Currents in various parts of the power section |
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