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SC1531CSTR Datasheet(PDF) 9 Page - Semtech Corporation

Part # SC1531CSTR
Description  200mA & 250mA SmartLDOs
Download  11 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC1531CSTR Datasheet(HTML) 9 Page - Semtech Corporation

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ã 2000 Semtech Corp.
www.semtech.com
SC1531(A)
POWER MANAGEMENT
(Remember that at 125°C, R
DS(ON) is generally 1.5x the
value at 25°C.)
Thermal Considerations
When operating from the 5V supply, the power
dissipation in the SC1531(A) is approximately equal to
the product of the output current and the input to
output voltage differential:
()
OUT
OUT
IN
D
I
V
V
P
The absolute worst-case dissipation is given by:
(
)
)
MAX
)(
AUX
(
Q
)
MAX
(
)
MAX
(
O
)
MIN
(
)
MAX
(
)
MAX
(
D
I
VAUX
I
VO
VIN
P
+
=
Note that the VAUX
(MAX) x IQ(AUX) term does not apply if
VAUX is not available or not connected.
Inserting VIN = 5.5V, VO = 3.234V, I
O = 200mA,
VAUX = 3.6V and I
Q(AUX) = 2mA yields:
W
46
.
0
P
)
MAX
(
D
=
Using this figure, we can calculate the maximum thermal
impedance allowable to maintain T
J £ 125°C:
(
) ()
W
/
C
73
R
therefore
,
W
/
C
47
R
W
/
C
120
46
.
0
70
125
P
T
T
R
)
MAX
)(
A
C
(
TH
)
MAX
)(
C
J
(
TH
)
MAX
(
D
)
MAX
(
A
)
MAX
(
J
)
MAX
)(
A
J
(
TH
°
=
°
=
°
=
=
=
This is readily achievable using pcb copper area to aid in
conducting the heat away from the device (see Figure 1
on page 10). Heatsinking the bypass FET is not
necessary - its power dissipation is given by:
()
)
MAX
)(
ON
(
DS
2
)
MAX
(
O
)
MAX
(
D
R
I
P
=
For I
O = 200mA, and RDS(ON) = 0.6W, PD = 24mW.
Layout Considerations
While layout for linear devices is generally not as critical
as for a switching application, careful attention to detail
will ensure reliable operation. See Figure 1 on page 10
for a sample layout.
1) Attaching the part to a larger copper footprint will
enable better heat transfer from the device, especially
on PCBs where there are internal ground and power
planes.
2) Place the bulk and decoupling capacitors close to the
device for optimal transient response.
3) If the SENSE lead is being used, route it to the load
using a seperate trace from the main VO path. If it is not
being used, connect to pin 7 as shown.
4) The external bypass FET is shown close to the device
for convenience only. Since it is not being switched, longer
gate drive traces can be used without problem.
Applications Information (Cont.)


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