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UR5HCSPI-06-FB Datasheet(PDF) 4 Page - Semtech Corporation |
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UR5HCSPI-06-FB Datasheet(HTML) 4 Page - Semtech Corporation |
4 / 20 page Copyright Semtech 1997-2000 DOC5-SPI-06-DS-103 www.semtech.com 4 PIN DESCRIPTIONS VCC and VSS VCC and VSS are the power supply and ground pins. The UR5HCSPI-06 will operate from a 3-5 Volt power supply. To prevent noise problems, provide bypass capacitors and place them as close as possible to the IC with the power supply. VX, where available, should be tied to Vcc. OSCI and OSCO OSCI and OSCO provide the input and output connections for the on- chip oscillator. The oscillator can be driven by any of the following circuits: - Crystal - Ceramic Resonator - External Clock Signal The frequency of the on-chip oscillator is 2 MHz. _RESET A logic zero on the _RESET pin will force the UR5HCSPI-06 into a known start-up state. The reset signal can be supplied by any of the following circuits: - RC - Voltage monitor - Master system reset MOSI, MISO, SCK, _SS, _ATN These five signals implement the SPI interface. The device acts as a slave on the SPI bus. The _SS (Slave Select) pin should be tied to ground if not used by the SPI master. The _ATN pin is asserted low each time the UR5HCSPI-06 has a packet ready for delivery. For a more detailed description, refer to the SPI Communication Channel section on page 9. _IOTEST and _WKU “Input Output Test” and “Wake Up” pins control the stop mode exit of the device. The designer can connect any number of active low signals to these two pins through a 17K resistor, in order to force the device to exit the stop mode. A sample circuit is shown on page 15 of this document. All the signals are “wire-anded.” When any one of these signals is not active, it should be floating (i.e., these signals should be driven from “open-collector” or “open-drain” outputs). Other configurations are possible; contact Semtech. R0-R 7 The R0-R7 pins are connected to the rows of the scanned matrix. Each pin provides an internal pull- up resistor, eliminating the need for external components. C0-C9 C0 to C9 are bi-directional pins connected to the columns of the scanned matrix. When a column is selected, the pin outputs an active low signal. When the column is de-selected, the pin turns into high-impedance. C10/WUKO The C10/WUKO pin acts alternatively as column scan output and as an input. As an input, the pin detects the “Wake-Up Keys Only” signal, typically provided by the host CPU to indicate that the user has turned the unit off. When the device detects an active high state on this pin, it feeds this information into the “Keyboard State Control” unit, in order to disable the keyboard and enable the programmed wake-up keys. C11/_LID The C11/_LID pin acts in a similar manner to the C10/WUKO. This pin is typically connected to the LID latch through a 150K resistor, in order to detect physical closing of the device cover. When the pin detects an active low state in this input, it feeds this information into the “Keyboard State Control” unit, in order to disable keys inside the case and enable only switches located physically on the outer body of the H/PC unit. |
Similar Part No. - UR5HCSPI-06-FB |
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Similar Description - UR5HCSPI-06-FB |
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