4

FN7009.8

November 12, 2010

Pin Descriptions

PIN NUMBER

PIN NAME

PIN TYPE

PIN DESCRIPTION

1

XTAL

Input

Crystal input (see Table 2 for details)

2

VBLANK

Logic Output

Vertical blank output

3

SYNCLOCK

Logic Output

Indicates that the EL4511 has locked to the line rate and has found three consecutive

“good H lines”

4

PWDN

Logic Input

Power-down = hi

5

SDENB

Logic Input

Serial interface enable = low

6

SCL

Logic Input

Serial clock

7

SDA

Logic BIDIR

Serial data (input for chip setup, output for diagnostic information)

8

GNDD1

Power

Digital ground 1

9

HIN

Input

Horizontal sync

10

SYNCIN

Input

Video input, which may incorporate sync signal; connect to Y or G

11

VERTIN

Input

Vertical sync input

12

LEVEL

Output

Indicates 2x amplitude of sync tip vs. back porch; referred to ground

13

GNDA1

Power

Analog ground 1

14

VCCA1

Power

Analog power supply 1

15

VCCA2

Power

Analog power supply 2

16

GNDA2

Power

Analog ground 2

17

GNDD2

Power

Digital ground 2

18

VCCD1

Power

Digital power supply 1

19

SYNCOUT

Logic Output

Composite sync output

20

BACKPORCH

Logic Output

Back porch output

21

HOUT

Logic Output

Horizontal sync output

22

VERTOUT

Logic Output

Vertical sync output

23

ODD/EVEN

Logic Output

Odd-Even field indicator output

24

XTALN

Output

Crystal output (see Table 2 for details)

Typical Performance Curves

FIGURE 1. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FIGURE 2. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

1.136W

θ

88

°C

/W

QS

OP

24

1.4

1.2

1

0.8

0.6

0.2

0

0

255075

100

150

AMBIENT TEMPERATURE (°C)

125

85

JEDEC JESD51-7 HIGH EFFECTIVE

THERMAL CONDUCTIVITY TEST BOARD

0.4

870mW

θ

115

°C

/W

QS

OP

24

1.2

1

0.8

0.6

0.4

0

0

255075

100

150

AMBIENT TEMPERATURE (°C)

125

85

JEDEC JESD51-3 LOW EFFECTIVE

THERMAL CONDUCTIVITY TEST BOARD

0.2

EL4511