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5962D0823001QXC Datasheet(PDF) 11 Page - Intersil Corporation |
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5962D0823001QXC Datasheet(HTML) 11 Page - Intersil Corporation |
11 / 12 page 11 Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6874.1 May 16, 2011 For additional products, see www.intersil.com/product_tree Layout Characteristics Step and Repeat: 2390µm x 2445µm The DELAY pad is not bonded. TABLE 1. LAYOUT X-Y COORDINATES PAD NAME X (µ m) Y (µ m) DX (µ m) DY (µ m) PROBES PER PAD IND 675 190 140 140 1 VS- 995 190 140 140 1 OUTD 2118 490 122 133 1 OUTC 2118 795 122 133 1 VH 2118 1039 122 345 2 2118 1211 OUTB 2118 1554 122 133 1 OUTA 2118 1861 122 133 1 VS+ 1015 2140 140 140 1 INA 608 2140 140 140 1 OE 213 1993 140 140 1 INB 213 1673 140 140 1 VL 213 1331 140 345 2 213 1159 GND 213 864 140 140 1 DELAY 213 585 140 140 0 INC 213 213 140 140 1 ISL7457SRH |
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