1

®

FN6811.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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FemtoCharge is a trademark of Kenet Inc. Copyright Intersil Americas Inc. 2008, 2009. All Rights Reserved

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KAD5510P-50

10-Bit, 500MSPS A/D Converter

The KAD5510P-50 is a low-power, high-performance, 10-bit,

500MSPS analog-to-digital converter designed with Intersil’s

proprietary FemtoCharge™ technology on a standard

CMOS process. The KAD5510P-50 is part of a

pin-compatible portfolio of 10, 12 and 14-bit A/Ds with

sample rates ranging from 125MSPS to 500MSPS.

The device utilizes two time-interleaved 10-bit, 250MSPS

A/D cores to achieve the ultimate sample rate of 500MSPS.

A single 500MHz conversion clock is presented to the

converter, and all interleave clocking is managed internally.

A serial peripheral interface (SPI) port allows for extensive

configurability, as well as fine control of matching

characteristics (gain, offset, skew) between the two

converter cores. These adjustments allow the user to

minimize spurs associated with the interleaving process.

Digital output data is presented in selectable LVDS or CMOS

formats. The KAD5510P-50 is available in a 72-contact QFN

package with an exposed paddle. Performance is specified

over the full industrial temperature range (-40°C to +85°C).

Features

• Programmable Gain, Offset and Skew Control

• 1.3GHz Analog Input Bandwidth

• 60fs Clock Jitter

• Over-Range Indicator

• Selectable Clock Divider:

÷1 or ÷2

• Clock Phase Selection

• Nap and Sleep Modes

• Two’s Complement, Gray Code or Binary Data Format

• DDR LVDS-Compatible or LVCMOS Outputs

• Programmable Built-in Test Patterns

• Single-Supply 1.8V Operation

• Pb-Free (RoHS Compliant)

Applications

• Radar and Satellite Antenna Array Processing

• Broadband Communications

• High-Performance Data Acquisition

Key Specifications

• Power Consumption = 414mW

Pin-Compatible Family

MODEL

RESOLUTION

SPEED

(MSPS)

KAD5514P-25

14

250

KAD5514P-21

14

210

KAD5514P-17

14

170

KAD5514P-12

14

125

KAD5512P-50

12

500

KAD5512P-25, KAD5512HP-25

12

250

KAD5512P-21, KAD5512HP-21

12

210

KAD5512P-17, KAD5512HP-17

12

170

KAD5512P-12, KAD5512HP-12

12

125

KAD5510P-50

10

500

DIGITAL

ERROR

CORRECTION

SHA

1.25V

VINP

VINN

10-BIT

250 MSPS

ADC

CLOCK GENERATION

&

INTERLEAVE CONTROL

SHA

10-BIT

250 MSPS

ADC

CLKP

CLKN

SPI

CONTROL

VREF

CLKOUTP

CLKOUTN

D[9:0]P

D[9:0]N

ORP

ORN

OUTFMT

OUTMODE

+

–

VCM

VREF

Data Sheet

October 8, 2009