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KAD5514P-17Q48 Datasheet(PDF) 9 Page - Intersil Corporation |
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KAD5514P-17Q48 Datasheet(HTML) 9 Page - Intersil Corporation |
9 / 34 page 9 FN6804.2 September 10, 2009 Pinout/Package Information Pin Descriptions - 72QFN PIN NUMBER LVDS [LVCMOS] NAME LVDS [LVCMOS] FUNCTION SDR MODE DDR MODE COMMENTS 1, 6, 12, 19, 24, 71 AVDD 1.8V Analog Supply 2-5, 13, 14, 17, 18 DNC Do Not Connect 7, 8, 11, 72 AVSS Analog Ground 9, 10 VINN, VINP Analog Input Negative, Positive 15 VCM Common Mode Output 16 CLKDIV Tri-Level Clock Divider Control 20, 21 CLKP, CLKN Clock Input True, Complement 22 OUTMODE Tri-Level Output Mode (LVDS, LVCMOS) 23 NAPSLP Tri-Level Power Control (Nap, Sleep modes) 25 RESETN Power On Reset (Active Low, see page 18) 26, 45, 55, 65 OVSS Output Ground 27, 36, 56 OVDD 1.8V Output Supply 28 D0N [NC] LVDS Bit 0 (LSB) Output Complement [NC in LVCMOS] DDR Logical Bits 1, 0 (LVDS) 29 D0P [D0] LVDS Bit 0 (LSB) Output True [ LVCMOS Bit 0] DDR Logical Bits 1, 0 (LVDS or CMOS) 30 D1N [NC] LVDS Bit 1 Output Complement [NC in LVCMOS] NC in DDR 31 D1P [D1] LVDS Bit 1 Output True [ LVCMOS Bit 1] NC in DDR 32 D2N [NC] LVDS Bit 2 Output Complement [NC in LVCMOS] DDR Logical Bits 3,2 (LVDS) 33 D2P [D2] LVDS Bit 2 Output True [ LVCMOS Bit 2] DDR Logical Bits 3,2 (LVDS or CMOS) 34 D3N [NC] LVDS Bit 3 Output Complement [NC in LVCMOS] NC in DDR 35 D3P [D3] LVDS Bit 3 Output True [ LVCMOS Bit 3] NC in DDR 37 D4N [NC] LVDS Bit 4 Output Complement [NC in LVCMOS] DDR Logical Bits 5,4 (LVDS) 38 D4P [D4] LVDS Bit 4 Output True [ LVCMOS Bit 4] DDR Logical Bits 5,4 (LVDS or CMOS) 39 D5N [NC] LVDS Bit 5 Output Complement [NC in LVCMOS] NC in DDR 40 D5P [D5] LVDS Bit 5 Output True [ LVCMOS Bit 5] NC in DDR 41 D6N [NC] LVDS Bit 6 Output Complement [NC in LVCMOS] DDR Logical Bits 7,6 (LVDS) 42 D6P [D6] LVDS Bit 6 Output True [ LVCMOS Bit 6] DDR Logical Bits 7,6 (LVDS or CMOS) 43 D7N [NC] LVDS Bit 7 Output Complement [NC in LVCMOS] NC in DDR 44 D7P [D7] LVDS Bit 7 Output True [ LVCMOS Bit 7] NC in DDR KAD5514P |
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