KAD5612P datasheet(9/29 Pages) INTERSIL

Part #	KAD5612P

Description	Dual 12-Bit, 250/210/170/125MSPS A/D Converter

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Manufacturer	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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9 / 29 page

9

FN6803.2

September 9, 2009

50

D6P

[D6]

LVDS Bit 6 Output True

[LVCMOS Bit 6]

51

D7N

[NC]

LVDS Bit 7 Output Complement

[NC in LVCMOS]

52

D7P

[D7]

LVDS Bit 7 Output True

[LVCMOS Bit 7]

53

D8N

[NC]

LVDS Bit 8 Output Complement

[NC in LVCMOS]

54

D8P

[D8]

LVDS Bit 8 Output True

[LVCMOS Bit 8]

57

D9N

[NC]

LVDS Bit 9 Output Complement

[NC in LVCMOS]

58

D9P

[D9]

LVDS Bit 9 Output True

[LVCMOS Bit 9]

59

D10N

[NC]

LVDS Bit 10 Output Complement

[NC in LVCMOS]

60

D10P

[D10]

LVDS Bit 10 Output True

[LVCMOS Bit 10]

61

D11N

[NC]

LVDS Bit 11 (MSB) Output Complement

[NC in LVCMOS]

62

D11P

[D11]

LVDS Bit 11 (MSB) Output True

[LVCMOS Bit 11]

63

ORN

[NC]

LVDS Over Range Complement,

[NC in LVCMOS]

64

ORP

[OR]

LVDS Over Range True

[LVCMOS Over Range]

66

SDO

SPI Serial Data Output (4.7k

Ω pull-up to OVDD is required)

67

CSB

SPI Chip Select (active low)

68

SCLK

SPI Clock

69

SDIO

SPI Serial Data Input/Output

70

OUTFMT

Output Data Format (Two’s Comp., Gray Code, Offset Binary)

Exposed Paddle

AVSS

Analog Ground

NOTE: LVCMOS Output Mode Functionality is shown in brackets (NC = No Connection)

Pin Descriptions (Continued)

PIN NUMBER

LVDS [LVCMOS] NAME

LVDS [LVCMOS] FUNCTION

KAD5612P

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