X9110TV14I-2.7 datasheet(3/18 Pages) INTERSIL

Part #	X9110TV14I-2.7

Description	Dual Supply/Low Power/1024-Tap/SPI Bus

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Manufacturer	INTERSIL [Intersil Corporation]

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3

FN8158.3

February 13, 2008

Circuit Level Applications

• Vary the gain of a voltage amplifier

• Provide programmable dc reference voltages for

comparators and detectors

• Control the volume in audio circuits

• Trim out the offset voltage error in a voltage amplifier

circuit

• Set the output voltage of a voltage regulator

• Trim the resistance in Wheatstone bridge circuits

• Control the gain, characteristic frequency and Q-factor in

filter circuits

• Set the scale factor and zero point in sensor signal

conditioning circuits

• Vary the frequency and duty cycle of timer ICs

• Vary the dc biasing of a pin diode attenuator in RF circuits

• Provide a control variable (I, V, or R) in feedback circuits

System Level Applications

• Adjust the contrast in LCD displays

• Control the power level of LED transmitters in

communication systems

• Set and regulate the DC biasing point in an RF power

amplifier in wireless systems

• Control the gain in audio and home entertainment systems

• Provide the variable DC bias for tuners in RF wireless

systems

• Set the operating points in temperature control systems

• Control the operating point for sensors in industrial

systems

• Trim offset and gain errors in artificial intelligent systems

Bus Interface Pins

SERIAL OUTPUT (SO)

SO is a serial data output pin. During a read cycle, data is

shifted out on this pin. Data is clocked out on the falling edge

of the serial clock.

SERIAL INPUT (SI)

SI is the serial data input pin. All opcodes, byte addresses

and data to be written to the pots and pot registers are input

on this pin. Data is latched by the rising edge of the serial

clock.

SERIAL CLOCK (SCK)

The SCK input is used to clock data into and out of the

X9110.

HOLD (HOLD)

HOLD is used in conjunction with the CS pin to select the

device. Once the part is selected and a serial sequence is

underway, HOLD may be used to pause the serial

communication with the controller without resetting the serial

sequence. To pause, HOLD must be brought LOW while SCK is

LOW. To resume communication, HOLD is brought HIGH, again

while SCK is LOW. If the pause feature is not used, HOLD should

be held HIGH at all times.

DEVICE ADDRESS (A0)

The address input is used to set the 8-bit slave address. A

match in the slave address serial data stream A0 must be

made with the address input (A0) in order to initiate

communication with the X9110.

CHIP SELECT (CS)

When CS is HIGH, the X9110 is deselected and the SO pin

is at high impedance, and (unless an internal write cycle is

underway) the device will be in the standby state. CS LOW

enables the X9110, placing it in the active power mode. It

should be noted that after a power-up, a HIGH to LOW

transition on CS is required prior to the start of any

operation.

HARDWARE WRITE PROTECT INPUT (WP)

The WP pin when LOW prevents nonvolatile writes to the

Data Registers.

Pin Descriptions

(TSSOP)

SYMBOL

FUNCTION

1

V+

Analog Supply Voltage

2

SO

Serial Data Output

3

A0

Device Address

4

SCK

Serial Clock

5WP

Hardware Write Protect

6

SI

Serial Data Input

7VSS

System Ground

8V

-

Analog Supply Voltage

9CS

Chip Select

10

HOLD

Device Select. Pause the Serial Bus

11

RW

Wiper Terminal of the Potentiometer

12

RH

High Terminal of the Potentiometer

13

RL

Low Terminal of the Potentiometer

14

VCC

System Supply Voltage

Pin Descriptions (Continued)

(TSSOP)

SYMBOL

FUNCTION

X9110

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