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X93256UV14I-2.7 Datasheet(PDF) 1 Page - Intersil Corporation |
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X93256UV14I-2.7 Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 7 page 1 ® FN8188.2 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2006, 2008. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X93256 Dual Digitally Controlled Potentiometers (XDCPs™) The Intersil X93256 is a dual digitally controlled potentiometer (XDCP). The device consists of two resistor arrays, wiper switches, a control section, and nonvolatile memory. The wiper positions are controlled by individual Up/Down interfaces. A potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The position of each wiper element is controlled by a set of independent CS, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon a subsequent power-up operation. Each potentiometer is connected as a three-terminal variable resistor and can be used in a wide variety of applications including: • Bias and Gain Control • LCD Contrast Adjustment Pinout X93256 (14 LD TSSOP) TOP VIEW Features • Dual solid-state potentiometers • Individual Up/Down interfaces • 32 wiper tap points per potentiometer - Wiper position stored in nonvolatile memory and recalled on power-up • 31 resistive elements per potentiometer - Temperature compensated - Maximum resistance tolerance of ±25% - Terminal voltage, 0 to VCC • Low power CMOS -VCC = 2.7V to 5.5V. - Active current, 200µA typical per potentiometer - Standby current, 4µA max per potentiometer • High reliability - Endurance 200,000 data changes per bit - Register data retention, 100 years •RTOTAL value = 12.5kΩ, 50kΩ • Package - 14 Ld TSSOP • Pb-free available (RoHS compliant) VCC CS1 INC2 U/D2 RH2 VSS 1 2 3 4 8 7 6 5 RL1 CS2 INC1 U/D1 RH1 RL2 14 13 12 11 9 10 Rw1 Rw2 *NC can be left unconnected, or connected to any voltage between VSS and VCC. Ordering Information PART NUMBER PART MARKING VCC LIMITS (V) RTOTAL (kΩ) TEMPERATURE RANGE (°C) PACKAGE PKG. DWG. # X93256UV14I-2.7* X9325 6UVG 2.7 to 5.5 50 -40 to +85 14 Ld TSSOP (4.4mm) M14.173 X93256UV14IZ-2.7* (Note) X9325 6UZG 50 -40 to +85 14 Ld TSSOP (4.4mm) (Pb-free) M14.173 X93256WV14I-2.7* X9325 6WVG 12.5 -40 to +85 14 Ld TSSOP (4.4mm) M14.173 X93256WV14IZ-2.7* (Note) X9325 6WZG 12.5 -40 to +85 14 Ld TSSOP (4.4mm) (Pb-free) M14.173 *Add "T1" suffix for tape and reel.Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Data Sheet February 1, 2008 |
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