BD8311NUV

Technical Note

4/14

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2010.11 - Rev.C

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Description of Blocks

1.

VREF

This block generates ERROR AMP reference voltage.

The reference voltage is 1.0 V.

2.

UVLO

Circuit for preventing low voltage malfunction

Prevents malfunction of the internal circuit at activation of the power supply voltage or at low power supply voltage.

Monitors VCC pin voltage to turn off all output FET and DC/DC converter output when VCC voltage is lower than 2.9 V,

and reset the timer latch of the internal SCP circuit and soft-start circuit. This threshold contains 200 mV hysteresis.

3.

SCP

Timer latch system short-circuit protection circuit

When the INV pin is the set 1.0 V or lower voltage, the internal SCP circuit starts counting.

The internal counter is in synch with OSC; the latch circuit activates after a lapse of 13.3 msec after the counter counts

about 16000 oscillations and then, turn off DC/DC converter output.

To reset the latch circuit, turn off the STB pin once. Then, turn it on again or turn on the power supply voltage again.

4.

OSC

Circuit for oscillating sawtooth waves with an operation frequency fixed at 1.2 MHz

5.

ERROR AMP

Error amplifier for detecting output signals and outputting PWM control signals

The internal reference voltage is set at 1.0 V.

A primary phase compensation device of 200 pF, 62 kΩ is built in between the inverting input terminal and the output

terminal of this ERROR AMP.

6.

PWM COMP

Voltage-pulse width converter for controlling output voltage corresponding to input voltage

Comparing the internal SLOPE waveform with the ERROR AMP output voltage, PWM COMP controls the pulse width to

the output to the driver.

Max Duty is set at 85%.

7.

SOFT START

Circuit for preventing in-rush current at startup by bringing the output voltage of the DC/DC converter into a soft-start

Soft-start time is in synch with the internal OSC, and the output voltage of the DC/DC converter reaches the set voltage

after about 10000 oscillations .

8.

PRE DRIVER

CMOS inverter circuit for driving the built-in Nch FET.

9.

STBY_IO

Voltage applied on STB pin (8 pin) to control ON/OFF of IC

Turned ON when a voltage of 2.5 V or higher is applied and turned OFF when the terminal is open or 0 V is applied.

Incorporates approximately 400 kΩ pull-down resistance.

10. Nch FET SW

Built-in SW for switching the coil current of the DC/DC converter. Incorporates an 80 mΩ NchFET SW capable of

withstanding 14 V.

Since the current rating of this FET is 2.5 A, it should be used within 2.5 A including the DC current and ripple current of

the coil.