Technical Note

BD8961NV

11/13

www.rohm.com

2010.04 - Rev.B

© 2010 ROHM Co., Ltd. All rights reserved.

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BD8961NV Cautions on PC Board layout

Fig.32 Layout diagram

①

For the sections drawn with heavy line, use thick conductor pattern as short as possible.

②

Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to

the pin PGND.

③

Lay out CITH and RITH between the pins ITH and GND as near as possible with least necessary wiring.

※

SON008V5060 (BD8961NV) has thermal FIN on the reverse of the package.

The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB.

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Recommended components Lists on above application

Symbol

Part

Value

Manufacturer

Series

L

Coil

2.2uH

TDK

LTF5022-2R2N3R2

Ceramic capacitor

22uF

Kyocera

CM32X5R226M10A

Ceramic capacitor

22uF

Kyocera

CM316B226M06A

Ceramic capacitor

680pF

murata

GRM18 Serise

Resistance

12kΩ

Rohm

MCR03Serise

*The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your

application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the

depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When

switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode

established between the SW and PGND pins.

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I/O equivalence circuit

Fig.33 I/O equivalence circuit

VOUT

ITH

GND

EN

SW

PGND

GND

EN

L

③

①

②

1

2

3

4

8

7

6

5

EN

・

EN pin

・

SW pin

SW

ITH

・

ITH pin

10kΩ

・

VOUT pin