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BD9673EFJ-E2 Datasheet(PDF) 11 Page - Rohm |
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BD9673EFJ-E2 Datasheet(HTML) 11 Page - Rohm |
11 / 17 page Technical Note 11/16 www.rohm.com 2011.07 - Rev.B © 2011 ROHM Co., Ltd. All rights reserved. BD9673EFJ (5) About Adjustment of DC/DC Comparator Frequency Characteristics Role of Phase compensation element CC1, CC2, RC (See P.7 Example of Reference Application Circuit) Stability and Responsiveness of Loop are controlled through VC Pin which is the output of Error Amp. The combination of zero and pole that determines Stability and Responsiveness is adjusted by the combination of resistor and capacitor that are connected in series to the VC Pin. DC Gain of Voltage Return Loop can be calculated for using the following formula. Here, VFB is Feedback Voltage (1.0V).AEA is Voltage Gain of Error amplifier (typ : 77dB), Gcs is the Trans-conductance of Current Detect (typ : 10A/V), and Rl is the Output Load Resistance value. There are 2 important poles in the Control Loop of this DC/DC. The first occurs with/ through the output resistance of Phase compensation Capacitor (C1) and Error amplifier. The other one occurs with/through the Output Capacitor and Load Resistor. These poles appear in the frequency written below. Here, GEA is the trans-conductance of Error amplifier(typ : 220µA/V). Here, in this Control Loop, one zero becomes important. With the zero which occurs because of Phase compensation Capacitor C1 and Phase compensation Resistor R3, the Frequency below appears. Also, if Output Capacitor is big, and that ESR (RESR) is big, in this Control Loop, there are cases when it has an important, separate zero (ESR zero). This ESR zero occurs due to ESR of Output Capacitor and Capacitance, and exists in the Frequency below. (ESR zero) In this case, the 3 rd pole determined with the 2nd Phase compensation Capacitor (C2) and Phase Correction Resistor (R3) is used in order to correct the ESR zero results in Loop Gain. This pole exists in the frequency shown below. (pole that corrects ESR zero) The target of Phase compensation design is to create a communication function in order to acquire necessary band and Phase margin. Cross-over Frequency (band) at which Loop gain of Return Loop becomes “0” is important. When Cross-over Frequency becomes low, Power supply Fluctuation Response, Load Response, etc worsens. On the other hand, when Cross-over Frequency is too high, instability of the Loop can occur. Tentatively, Cross-over Frequency is targeted to be made 1/20 or below of Switching Frequency. Vout V A Gcs Rl Adc FB EA = EA EA A C1 2 G 1 fp = π Rl COUT 2 1 fp2 = π R3 C1 2 1 1 fz = π RESR COUT 2 1 fz = π R3 C2 2 1 3 fp = π |
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