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LH28F008SC Datasheet(PDF) 1 Page - Sharp Corporation |
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LH28F008SC Datasheet(HTML) 1 Page - Sharp Corporation |
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1 / 38 page  LH28F008SC 1 8M (1M × 8) Flash Memory Figure 2. TSOP 40-Pin Configuration FEATURES • High-Density Symmetrically-Blocked Architecture – Sixteen 64K Erasable Blocks • High-Performance – 85 ns Read Access Time • Enhanced Automated Suspend Options – Byte Write Suspend to Read – Block Erase Suspend to Byte Write – Block Erase Suspend to Read • Enhanced Data Protection Features – Absolute Protection with V PP = GND – Flexible Block Locking – Block Erase/Byte Write Lockout during Power Transitions • Extended Cycling Capability – 100,000 Block Erase Cycles – 1.6 Million Block Erase Cycles/Chip • Low Power Management – Deep Power-Down Mode – Automatic Power Saving Mode Decreases I CC in Static Mode • Automated Byte Write and Block Erase – Command User Interface – Status Register • SmartVoltage Technology – 3.3 V or 5 V V CC – 3.3 V, 5 V, or 12 V V PP • SRAM - Compatible Write Interface • ETOX™ V Nonvolatile Flash Technology • Industry - Standard Packaging – 42-Pin, .67 mm × 8 mm2 CSP Package – 40-Pin, 1.2 mm × 10 mm × 20 mm TSOP (Type I) Package – 44-Pin, 600-mil, SOP Package 28F008SC-1 TOP VIEW 40-PIN TSOP 2 3 4 5 8 9 A12 A15 37 36 35 34 33 32 29 26 6 7 A13 A14 A16 A19 A17 A18 31 30 OE RY/BY DQ6 10 11 12 39 38 WE 13 28 DQ3 DQ2 DQ1 27 DQ7 14 15 16 17 18 19 20 23 25 24 22 21 A0 A1 A2 A3 A6 A5 A7 A4 A10 A9 A11 A8 NC DQ5 DQ4 VCC DQ0 40 1 NC VPP VCC RP CE GND GND 28F008SC-20 TOP VIEW 42-PIN CSP A5 A A8 A11 VPP A12 A15 A17 12 3 4 5 6 7 A4 A7 A10 VCC A18 A13 NC A6 A9 RP CE A14 A16 A19 A3 DQ1 NC VCC DQ4 DQ7 NC A2 A0 DQ3 GND DQ6 OE NC A1 B C D E F DQ0 DQ2 GND DQ5 RY/BY WE Figure 1. CSP 42-Pin Configuration |
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