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LH28F400SUE-NC60 Datasheet(PDF) 4 Page - Sharp Corporation |
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LH28F400SUE-NC60 Datasheet(HTML) 4 Page - Sharp Corporation |
4 / 35 page LH28F400SU-NC 4M (512K × 8, 256K × 16) Flash Memory 4 PIN DESCRIPTION SYMBOL TYPE NAME AND FUNCTION DQ 15 - A-1 INPUT BYTE-SELECT ADDRESSES: Selects between high and low byte when device is in x8 mode. This address is latched in x8 Data Writes. Not used in x16 mode (i.e., the DQ 15/A-1 input buffer is turned off when BYTE is high). A 0 - A12 INPUT WORD-SELECT ADDRESSES: Select a word within one 16K block. These addresses are latched during Data Writes. A 13 - A17 INPUT BLOCK-SELECT ADDRESSES: Select 1 of 32 Erase blocks. These addresses are latched during Data Writes, Erase and Lock-Block operations. DQ 0 - DQ7 INPUT/OUTPUT LOW-BYTE DATA BUS: Inputs data and commands during CUI write cycles. Outputs array, buffer, identifier or status data in the appropriate Read mode. Floated when the chip is de-selected or the outputs are disabled. DQ 8 - DQ15 INPUT/OUTPUT HIGH-BYTE DATA BUS: Inputs data during x16 Data Write operations. Outputs array, buffer or identifier data in the appropriate Read mode; not used for Status register reads. Floated when the chip is de-selected or the outputs are disabled. DQ 15/A-1 is address. CE » INPUT CHIP ENABLE INPUT: Activate the device’s control logic, input buffers, decoders and sense amplifiers. CE » must be low to select the device. RP » INPUT RESET/POWER-DOWN: With RP » low, the device is reset, any current operation is aborted and device is put into the deep power down mode. When the power is turned on, RP » pin is turned to low in order to return the device to default con- figuration. When the power transition is occurred, or the power on/off, RP » is required to stay low in order to protect data from noise. When returning from Deep Power-Down, a recovery time of 430 ns is required to allow these circuits to power up. When RP » goes low, any current or pending WSM operation(s) are terminated, and the device is reset. All Status registers return to ready (with all status flags cleared). After returning, the device is in read array mode. OE » INPUT OUTPUT ENABLE: Gates device data through the output buffers when low. The outputs float to tri-state off when OE » is high. WE INPUT WRITE ENABLE: Controls access to the CUI, Data Queue Registers and Address Queue Latches. WE is active low, and latches both address and data (command or array) on its rising edge. RY »/BY » OPEN DRAIN OUTPUT READY/BUSY: Indicates status of the internal WSM. When low, it indicates that the WSM is busy performing an operation. When the WSM is ready for new operation or Erase is Suspended, or the device is in deep power-down mode RY »/BY » pin is floated. BYTE INPUT BYTE ENABLE : BYTE low places device in x8 mode. All data is then input or output on DQ 0 - DQ7, and DQ8 - DQ15 float. Address A-1 selects between the high and low byte. BYTE high places the device in x16 mode, and turns off the A -1 input buffer. Address A 0, then becomes the lowest order address. V PP SUPPLY ERASE/WRITE POWER SUPPLY (5.0 V ±0.5 V): For erasing memory array blocks or writing words/bytes into the flash array. V CC SUPPLY DEVICE POWER SUPPLY (3.3 V ±0.3 V): Do not leave any power pins floating. GND SUPPLY GROUND FOR ALL INTERNAL CIRCUITRY: Do not leave any ground pins floating. NC NO CONNECT: No internal connection to die, lead may be driven or left floating. |
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