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ISL282X7SOICEVAL2Z Datasheet(PDF) 1 Page - Intersil Corporation |
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ISL282X7SOICEVAL2Z Datasheet(HTML) 1 Page - Intersil Corporation |
1 / 4 page 1 Application Note 1509 ISL282X7SOICEVAL2Z Evaluation Board User’s Guide Introduction The ISL282X7SOICEVAL2Z evaluation board is a design platform containing all the circuitry needed to characterize critical performance parameters of the ISL282X7 operational amplifiers in SOIC-8 package, using a variety of user defined test circuits. The ISL282X7 operational amplifiers feature low bias current, low noise, and low offset and temperature drift. Reference Documents • ISL28207 Data Sheet, FN6631 • ISL28217 Data Sheet, FN6632 • ISL28227 Data Sheet, FN6633 Evaluation Board Key Features The ISL282X7SOICEVAL2Z is designed to enable the IC to operate from a single supply, +4.5VDC to +40VDC or from split supplies, ±2.25VDC to ±20V. The board is configured for a dual op amp connected for differential input with a closed loop gain of 10. A single external reference voltage (VREF) pin and provisions for a user-selectable voltage divider - filter are included. Power Supplies (Figure 1) External power connections are made through the +V, -V, VREF and Ground connections on the evaluation board. For single supply operation, the -V and Ground pins are tied together to the power supply negative terminal. For split supplies, +V and -V terminals connect to their respective power supply terminals. De-coupling capacitors C2 and C4 connect to their respective supplies through R16 and R31 zero-ohm resistors. These resistors are 0Ω but can be changed by the user to provide additional power supply filtering, or to reduce the voltage rate-of-rise to less than ±1V/µs. Two additional capacitors, C3 and C5 are connected close to the part to filter out high frequency noise. Anti-reverse diode D1 protects the circuit in the case of accidental polarity reversal. Amplifier Configuration (Figure 2) The schematic of 1/2 of the op-amp with the components supplied is shown in Figure 2. The circuit implements a differential input amp with a closed loop gain of 10. The circuit can operate from a single supply or from dual supplies. The VREF pin must be connected to ground to establish a ground referenced input for dual supply operation, or can be externally set to any reference level for single supply operation. VREF should not be left floating. 0.01µF 0.01µF D1 C2 C4 C3 C5 J11 J14 J12 J13 J6 J8 1µF 1µF VREF V+ V- FIGURE 1. POWER SUPPLY CIRCUIT IN- IN+ RF VREF IN - IN + GND 100kΩ RREF+ VOUT ISL282X7 (1/2) VP V- 0Ω VM VCM IN- IN+ VREF V+ RIN- 10kΩ RIN+ 10kΩ - + 100kΩ RL DNP FIGURE 2. BASIC AMPLIFIER CONFIGURATION CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2009. All Rights Reserved All other trademarks mentioned are the property of their respective owners. November 6, 2009 AN1509.0 |
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