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NX3DV2567HR Datasheet(PDF) 4 Page - NXP Semiconductors |
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NX3DV2567HR Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 20 page NX3DV2567 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 1 — 28 September 2010 4 of 20 NXP Semiconductors NX3DV2567 Low-ohmic four-pole double-throw analog switch 7.2 Pin description 8. Functional description [1] H = HIGH voltage level; L = LOW voltage level. 9. Limiting values Table 3. Pin description Symbol Pin Description 1Y0 1 independent input or output (supply switch) 2Y0, 3Y0, 4Y0 5, 9, 13 independent input or output (data switch) S 2 select input 1Y1 15 independent input or output (supply switch) 2Y1, 3Y1, 4Y1 3, 7, 11 independent input or output (data switch) 1Z 16 common output or input (supply switch) 2Z, 3Z, 4Z 4, 8, 12 common output or input (data switch) GND 6 ground (0 V) n.c. 10 not connected VCC 14 supply voltage Table 4. Function table[1] Input S Channel on LnY0 HnY1 Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +4.6 V VI input voltage select input S [1] −0.5 +4.6 V VSW switch voltage [2] −0.5 VCC + 0.5 V IIK input clamping current VI < −0.5 V −50 - mA ISK switch clamping current VI < −0.5 V or VI >VCC + 0.5 V - ±50 mA ISW switch current supply path switch VSW > −0.5 V or VSW < VCC + 0.5 V; source or sink current - ±350 mA VSW > −0.5 V or VSW < VCC + 0.5 V; pulsed at 1 ms duration, < 10 % duty cycle; peak current - ±500 mA data path switch VSW > −0.5 V or VSW < VCC + 0.5 V; source or sink current - ±128 mA Tstg storage temperature −65 +150 °C |
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