STAC2942B mounting recommendations

STEVAL-TDR029V1

6/10

Doc ID 17470 Rev 1

4.3

Surface conditions of the mounting base

The mounting base, or surface of the heatsink to which the backside of the package is

mounted, must be flat, clean, and free of tool marks.

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Flatness: 400 µin/in (0.4 µm/mm)

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Roughness: Ra<30 µin (0.8 µm)

Flatness and roughness values can be achieved on the above-mentioned materials with

standard machining processes, such as milling.

Holes for screws, solder wells, etc. should be slightly countersunk and/or de-burred.

4.4

Thermal interface material

Careful consideration must be paid to the actual interface layer between the backside of the

package and the mounting base. Cleanliness is key: particulates, grease, and oxidation

should be removed using standard practices.

A thermal interface material (TIM) of good thermal conductivity should be used in order to fill

any discontinuities between the package and mounting base surface. The decision of which

TIM material to use is based on many factors. Many types of TIMs are available today with

an incredible range of thermal/electrical/mechanical properties. Several are listed here:

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WPSII (a silicone-free compound, Austerlitz Electronics),

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Type 340 (Dow Corning)

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Type 120 (a silicone compound, Wakefield Thermal Solutions)

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Indium foil (Indium Corp.)

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Sn63Pb37 or Pb-free solder

In all cases, the chosen TIM should be no thicker than necessary and applied as evenly as

possible. For liquid compounds, it is easiest to apply to the backside of the package, keeping

in mind that excessive TIM thickness results in a higher thermal resistance than using no

TIM at all. For foils and soldering it is best to specify an appropriately-sized “preform” and

apply it to the thermal base.

4.5

Seating plane

The seating plane refers to the distance between the thermal base and the bottom of the

transistor leads. This is shown on the package outline drawing to indicate the total thickness

of the PCB, or PCB+channel depth of the heatsink. Some points to consider are:

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The leads of the transistor should launch perpendicular to the package body onto the

traces of the PCB to reduce mechanical stress to the package and solder joints. In

some cases, the PCB fabrication tolerances are such that the leads extend above the

plane defined by the top of the PCB; this situation is best handled with a judicious

selection of solder pad preform or paste thickness, or by a slight downward bending of

the transistor leads (no more than 0.01 in (0.25 mm). In no case should the leads be

bent higher than the topside of the PCB, to avoid shear stresses which could cause

damage to the interface between the lead and the package body.

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Care should be taken to factor in the thickness of the TIM used, which is equivalent to

increasing the seating plane dimension.