LPC1758FBD80 datasheet(6/74 Pages) NXP

Part #	LPC1758FBD80

Description	32-bit ARM Cortex-M3 MCU; up to 512 kB flash and 64 kB SRAM with Ethernet, USB 2.0 Host/Device/OTG, CAN

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Manufacturer	NXP [NXP Semiconductors]

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LPC1759_58_56_54_52_51

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Product data sheet

Rev. 7 — 29 March 2011

6 of 74

NXP Semiconductors

LPC1759/58/56/54/52/51

32-bit ARM Cortex-M3 microcontroller

6.

Pinning information

6.1 Pinning

6.2 Pin description

Fig 2.

Pin configuration LQFP80 package

60

41

1

20

002aae158

Table 3.

Pin description

Symbol

Type

Description

P0[0] to P0[31]

I/O

Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each bit. The

operation of Port 0 pins depends upon the pin function selected via the pin

connect block. Some port pins are not available on the LQFP80 package.

P0[0]/RD1/TXD3/

SDA1

37[1]

I/O

P0[0] — General purpose digital input/output pin.

I

RD1 — CAN1 receiver input.

O

TXD3 — Transmitter output for UART3.

I/O

SDA1 — I2C1 data input/output (this is not an I2C-bus compliant open-drain pin).

P0[1]/TD1/RXD3/

SCL1

38[1]

I/O

P0[1] — General purpose digital input/output pin.

O

TD1 — CAN1 transmitter output.

I

RXD3 — Receiver input for UART3.

I/O

SCL1 — I2C1 clock input/output (this is not an I2C-bus compliant open-drain pin).

P0[2]/TXD0/AD0[7] 79[2]

I/O

P0[2] — General purpose digital input/output pin.

O

TXD0 — Transmitter output for UART0.

I

AD0[7] — A/D converter 0, input 7.

P0[3]/RXD0/AD0[6] 80[2]

I/O

P0[3] — General purpose digital input/output pin.

I

RXD0 — Receiver input for UART0.

I

AD0[6] — A/D converter 0, input 6.

P0[6]/

I2SRX_SDA/

SSEL1/MAT2[0]

64[1]

I/O

P0[6] — General purpose digital input/output pin.

I/O

I2SRX_SDA — Receive data. It is driven by the transmitter and read by the

receiver. Corresponds to the signal SD in the I2S-bus specification.

(LPC1759/58/56 only).

I/O

SSEL1 — Slave Select for SSP1.

O

MAT2[0] — Match output for Timer 2, channel 0.

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