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PSMN7R5-25YLC Datasheet(PDF) 7 Page - NXP Semiconductors |
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PSMN7R5-25YLC Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 15 page PSMN7R5-25YLC All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Preliminary data sheet Rev. 1 — 12 July 2011 7 of 15 NXP Semiconductors PSMN7R5-25YLC N-channel 25 V 7.4 m Ω logic level MOSFET in LFPAK using NextPower technology Qoss output charge VGS =0V; VDS = 12V; f= 1MHz - 6.2 - nC Source-drain diode VSD source-drain voltage IS =15A; VGS =0V; Tj =25 °C; see Figure 17 - 0.85 1.1 V trr reverse recovery time IS =15A; dIS/dt = -100 A/µs; VGS =0V; VDS =12 V - 21.2 - ns Qr recovered charge - 11.6 - nC ta reverse recovery rise time VGS =0V; IS =15A; dIS/dt = -100 A/µs; VDS =12V; see Figure 18 - 11.6 - ns tb reverse recovery fall time - 9.6 - ns Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit Fig 6. Output characteristics; drain current as a function of drain-source voltage; typical values Fig 7. Drain-source on-state voltage as a function of gate-source voltage; typical values 003a a g169 0 20 40 60 0 0.5 1 1.5 2 VDS (V) ID (A) 3.0 3.5 4.5 10 2.4 2.2 VGS (V) = 2.6 2.8 003aag170 0 4 8 12 16 20 24 0 4 8 12 16 V GS(V) R DSon (m Ω) |
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