PSMN7R5-25YLC

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Preliminary data sheet

Rev. 1 — 12 July 2011

10 of 15

NXP Semiconductors

PSMN7R5-25YLC

N-channel 25 V 7.4 m

Ω logic level MOSFET in LFPAK using NextPower technology

Fig 16. Input, output and reverse transfer capacitances

as a function of drain-source voltage; typical

values

Fig 17. Source current as a function of source-drain

voltage; typical values

Fig 18. Reverse recovery timing definition

003a a g178

10

10

2

10

3

10

4

10

-1

1

10

10

2

C

(pF)

003a a g179

0

20

40

60

80

0

0.3

0.6

0.9

1.2

(A)

C

C

003a a f 444

0

t (s )

(A)