TLK2711-SP

TERMINAL FUNCTIONS

TERMINAL

I/O

DESCRIPTION

NAME

PIN NO.

Serial transmit outputs. TXP and TXN are differential serial outputs that interface to copper or an

DOUTTXN

63

optical I/F module. These terminals transmit NRZ data at a rate of 20 times the TXCLK value. TXP

O

DOUTTXP

64

and TXN are put in a high-impedance state when LOOPEN is high and are active when LOOPEN

is low. During power-on reset, these terminals are high impedance.

Device enable. When this terminal is held low, the device is placed in power-down mode. Only the

ENABLE

25

signal detect circuit on the serial receive pair is active. When asserted high while the device is in

power-down mode, the transceiver goes into power-on reset before beginning normal operation.

5, 13, 17,

19, 29, 34,

Analog and digital logic ground. Provides a ground for the logic circuits, digital I/O buffers, and the

GND

35, 45, 51,

high-speed analog circuits.

55, 58, 62,

65

Lock to reference. When LCKREFN is low, the receiver clock is frequency locked to TXCLK. This

places the device in a transmit-only mode since the receiver is not tracking the data. When

LCKREFN

26

LCKREFN is asserted low, the receive data bus terminals (RXD0–RXD15, RXCLK, RKLSB, and

RKMSB) are in a high-impedance state.

When LCKREFN is deasserted high, the receiver is locked to the received data stream.

Loop enable. When LOOPEN is active high, the internal loopback path is activated. The

transmitted serial data is directly routed internally to the inputs of the receiver. This provides a

LOOPEN

22

self-test capability in conjunction with the protocol device. The TXP and TXN outputs are held in a

high-impedance state during the loopback test. LOOPEN is held low during standard operational

state, with external serial outputs and inputs active.

Preemphasis control. Selects the amount of preemphasis to be added to the high-speed serial

PRE

60

output drivers. Left low or unconnected, 5% preemphasis is added. Pulled high, 20% preemphasis

is added.

PRBS test enable. When asserted high, results of pseudo-random bit stream (PRBS) tests can be

PRBSEN

27

monitored on the RKLSB terminal. A high on RKLSB indicates that valid PRBS is being received.

K-code indicator/PRBS test results. When RKLSB is asserted high, an 8-bit/10-bit K code was

received and is indicated by data bits RXD0–RXD7. When RKLSB is asserted low, an 8-bit/10-bit

RKLSB

30

O

D code is received and is presented on data bits RXD0–RXD7. When PRBSEN is asserted high,

this pin is used to indicate status of the PRBS test results (high = pass).

K-code indicator. When RKMSB is asserted high an 8-bit/10-bit K code was received and is

indicated by data bits RXD8–RXD15. When RKMSB is asserted low an 8-bit/10-bit D code was

RKMSB

31

O

received and is presented on data bits RXD8–RXD15. If the differential signal on RXN and RXP

drops below 200 mV, RXD0–RXD15, RKLSB, and RKMSB are all asserted high.

RXCLK

Recovered clock. Output clock that is synchronized to RXD0–RXD9, RKLSB, and RKMSB. RXCLK

43

O

RX_CLK

is the recovered serial data rate clock divided by 20. RXCLK is held low during power-on reset.

RXD0

54

RXD1

53

RXD2

52

RXD3

49

RXD4

48

RXD5

47

RXD6

46

Receive data bus. These outputs carry 16-bit parallel data output from the transceiver to the

RXD7

44

O

protocol device, synchronized to RXCLK. The data is valid on the rising edge of RXCLK as shown

RXD8

42

in Figure 5. These terminals are in high-impedance state during power-on reset.

RXD9

41

RXD10

39

RXD11

38

RXD12

37

RXD13

36

RXD14

33

RXD15

32

DINRXN

56

Serial receive inputs. RXP and RXN together are the differential serial input interface from a

I

DINRXP

57

copper or an optical I/F module.

TESTEN

28

Test mode enable. This terminal should be left unconnected or tied low.

(1)

Internal 10-k

Ω pullup

(2)

Internal 10-k

Ω pulldown

4

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