DS75LV: Digital Thermometer and Thermostat

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REGISTER POINTER

The four DS75LV registers each have a unique two-bit pointer designation, which is defined in Table 6. When

reading from or writing to the DS75LV, the user must “point” the DS75LV to the register that is to be accessed.

When reading from the DS75LV, once the pointer is set, it will remain pointed at the same register until it is

changed. For example, if the user desires to perform consecutive reads from the temperature register, then the

pointer only has to be set to the temperature register one time, after which all reads will automatically be from the

temperature register until the pointer value is changed. When writing to the DS75LV, the pointer value must be

refreshed each time a write is performed, even if the same register is being written to twice in a row.

At power-up, the pointer defaults to the temperature register location. The temperature register can be read

immediately without resetting the pointer.

Changes to the pointer setting are accomplished as described in the 2-WIRE SERIAL DATA BUS section of this

data sheet.

Table 6. Pointer Definition

REGISTER

P1

P0

Temperature

0

0

Configuration

0

1

1

0

1

1

2-WIRE SERIAL DATA BUS

The DS75LV communicates over a standard bi-directional 2-wire serial data bus that consists of a serial clock

(SCL) signal and serial data (SDA) signal. The DS75LV interfaces to the bus via the SCL input pin and open-drain

SDA I/O pin. All communication is MSb first.

The following terminology is used to describe 2-wire communication:

Master Device: Microprocessor/microcontroller that controls the slave devices on the bus. The master device

generates the SCL signal and START and STOP conditions.

Slave: All devices on the bus other than the master. The DS75LV always functions as a slave.

Bus Idle or Not Busy: Both SDA and SCL remain high. SDA is held high by a pullup resistor when the bus is idle,

and SCL must either be forced high by the master (if the SCL output is push-pull) or pulled high by a pullup resistor

(if the SCL output is open-drain).

Transmitter: A device (master or slave) that is sending data on the bus.

Receiver: A device (master or slave) that is receiving data from the bus.

START Condition: Signal generated by the master to indicate the beginning of a data transfer on the bus. The

master generates a START condition by pulling SDA from high to low while SCL is high (see Figure 6). A

“repeated” START is sometimes used at the end of a data transfer (instead of a STOP) to indicate that the master

will perform another operation.

STOP Condition: Signal generated by the master to indicate the end of a data transfer on the bus. The master

generates a STOP condition by transitioning SDA from low to high while SCL is high (see Figure 6). After the

STOP is issued, the master releases the bus to its idle state.

Acknowledge (ACK): When a device (either master or slave) is acting as a receiver, it must generate an

acknowledge (ACK) on the SDA line after receiving every byte of data. The receiving device performs an ACK by

pulling the SDA line low for an entire SCL period (see Figure 6). During the ACK clock cycle, the transmitting

device must release SDA. A variation on the ACK signal is the “not acknowledge” (NACK). When the master device

is acting as a receiver, it uses a NACK instead of an ACK after the last data byte to indicate that it is finished

receiving data. The master indicates a NACK by leaving the SDA line high during the ACK clock cycle.

Slave Address: Every slave device on the bus has a unique 7-bit address that allows the master to access that

corresponding input pins. The three address pins allow up to eight DS75LVs to be multi-dropped on the same bus.