Low-Frequency, Spread-Spectrum

EconOscillator

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7

Detailed Description

The DS1090 is a center-dithered, spread-spectrum sili-

con oscillator for use as an external clock in reduced-

EMI applications. With a combination of factory-

programmed prescalers and a user-selected external

resistor, output frequencies from 125kHz to 8MHz can

be achieved. The output center frequency can be

dithered by selecting the desired dither rate and ampli-

tude with discrete inputs J0, J1, JC0, and JC1.

The DS1090 contains four basic circuit blocks: master

oscillator, factory-programmed prescaler, dither gener-

ator, and the voltage-bias circuit that provides the feed-

back path to the master oscillator for frequency control

and dithering functions.

Master Oscillator

The master oscillator is programmable in the applica-

ground (GND). Resistor values of 45k

Ω to 91kΩ vary

the square-wave output frequency of the voltage-con-

4MHz (see Figure 1).

The master oscillator (Hz) frequency can be stated as

Factory-Programmed Prescaler

The prescaler divides the frequency of the master oscil-

lator by 1, 2, 4, 8, 16, or 32 to generate the square-

is an ordering option.

Dither Generator

Spread-spectrum functionality is achieved by a user-

configurable divider (determines dither rate), a triangle

generator, and a user-configurable dither amplitude cir-

cuit (see

Block Diagram).

The input to the triangle-wave generator is derived from

the internal master oscillator and is fed through a user-

configurable divider. The settings of control pins JC0

and JC1 determine this dither rate divisor setting (see

Table 1), dividing the master clock by 4, 8, 16, or 32.

The clock signal is further divided by 128 in the

triangle-wave generator, which results in a triangle-

wave signal of either 1/512th, 1/1024th, 1/2048th, or

upon the user’s divisor setting.

The dithering frequency can be also expressed as the

result of

where Divisor is 4, 8, 16, or 32.

f

f

Divisor

MOD

MOSC

=

×128

f

E

sistor

+

3 6461

11

.

Re

MASTER OSCILLATOR FREQUENCY vs.

EXTERNAL RESISTOR SELECTION

Ω)

90

80

70

60

50

4

5

6

7

8

9

3

40

Figure 1. Master Oscillator Frequency

TIME

DITHER

AMOUNT

(2, 4, OR 8%)

IF DITHER AMOUNT = 0%

1

Figure 2. Center Frequency Dither Diagram

JC1

JC0

DITHERING PERCENTAGE

DIVISOR

SETTING

00

4

01

8

10

16

11

32

Table 1. Dither Rate Divisor Settings