ISL85402

3

FN7640.0

September 29, 2011

SYNC

12

This pin can be used to synchronize two or more ISL85402 controllers. Multiple ISL85402 can be synchronized with their SYNC pins

connected together. 180 degree phase shift is automatically generated between the master and slave ICs.

The internal oscillator can also lock to an external frequency source applied on this pin with square pulse waveform (with frequency

10% higher than the IC’s local frequency, and pulse width higher than 150ns). Range: 0V to 5.5V.

This pin should be left floating if not used.

LGATE

13

In synchronous buck mode, this Pin is used to drive the lower side MOSFET to improve efficiency.

In non-synchronous buck when a diode is used as the bottom side power device, this pin should be connected to VCC before VCC

startup to have low-side driver (LGATE) disabled.

In boost mode, it can be used to drive the boost power MOSFET. The boost control PWM is same with the buck control PWM.

PGND

14

This pin is used as the ground connection of the power flow including driver. Connect it to large ground plane.

BOOT

15

This pin provides bias voltage to the high-side MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive the

internal N-channel MOSFET. The boot charge circuitries are integrated inside of the IC. No external boot diode is needed. A 1µF

ceramic capacitor is recommended to be used between BOOT and PHASE pin.

VIN

16, 17

Connect the input rail to these pins that are connected to the drain of the integrated high-side MOSFET as well as the source for the

internal linear regulator that provides the bias of the IC. Range: 3V to 36V.

With the part switching, the operating input voltage applied to the VIN pins must be under 36V. This recommendation allows for

short voltage ringing spikes (within a couple of ns time range) due to switching while not exceeding Absolute Maximum Ratings.

SGND

18

This pin provides the return path for the control and monitor portions of the IC. Connect it to quite ground plane.

VCC

19

This pin is the output of the internal linear regulator that supplies the bias for the IC including the driver. A minimum 4.7µF

decoupling ceramic capacitor is recommended between VCC to ground.

AUXVCC

7

This pin is the input of the auxiliary internal linear regulator which can be supplied by the regulator output after power-up. With such

configuration, the power dissipation inside of the IC is reduced. The input range for this LDO is 3V to 20V.

In boost mode operation, this pin works as boost output overvoltage detection pin. It detects the boost output through a resistor

divider. When voltage on this pin is above 0.8V, the boost PWM disabled; and when voltage on this pin is below 0.8V minus the

hysteresis, the boost PWM is enabled.

Range: 0V to 20V.

PAD

21

Bottom thermal pad. It is not connected to any electrical potential of the IC. In layout it must be connected to PCB ground copper

plane with area as large as possible to effectively reduce the thermal impedance.

PIN NAME

PIN #

DESCRIPTION

Ordering Information

PART NUMBER

(Notes 1, 2, 3)

PART

MARKING

TEMP.

RANGE (°C)

PACKAGE

(PB-Free)

PKG. DWG. #

ISL85402IRZ

85 402IRZ

-40 to +85

20 Ld 4x4 QFN

L20.4x4C

ISL85402EVAL1Z

Evaluation Board

NOTES:

1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.

2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte

tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil

Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

3. For Moisture Sensitivity Level (MSL), please see device information page for ISL85402. For more information on MSL please see techbrief TB363.